HDSP-3400 Agilent(Hewlett-Packard), HDSP-3400 Datasheet - Page 11

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HDSP-3400

Manufacturer Part Number
HDSP-3400
Description
20 mm (0.8 inch) Seven Segment Displays
Manufacturer
Agilent(Hewlett-Packard)
Datasheet
Table 6: Intel 80C88A Write Cycle Timing Parameters (Busmode = 1)
Note: HI_ADDR[4:0] is derived from the processor(80C88A) A15-A8 bus and HI_DATA[7:0] is
connected to the AD7 - AD0 bus.
#This page is only for HDM8513AP.
Symbol
t doz1
t pw1
t su1
t h1
t d1
Input Data Setup before /WE Inactive
Input Address, Data and /CE Hold after /WE Inactive
/WE Low Duration
Delay from /CE to DTACK Active
Delay from /WE Inactive to DTACK in Tristate Mode
HI_ADDR [4:0]
/CE
/WE
DTACK
HI_DATA[7:0]
F
IGURE
4: I
NTEL
Parameter
80C88A W
t
d1
RITE
T
IMING
Valid
t
pw1
D
IAGRAM
t
su1
t
doz1
Min.
t
200
h1
20
8
-
-
Max.
35
15
-
-
-
Unit
ns
ns
ns
ns
ns
11

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