ADE3000SXT STMicroelectronics, ADE3000SXT Datasheet - Page 41

• Manufacturer Part Number: ADE3000SXT
• Description: LCD Display Engines with Integrated DVI/ ADC and YUV Ports
• Manufacturer: STMicroelectronics

ADE3XXX
SMUX_CTRL2
SMUX_CLAMP_SET_L
SMUX_CLAMP_SET_H
SMUX_CLAMP_RST_L
SMUX_CLAMP_RST_H
SMUX_HENAB_SET_L
SMUX_HENAB_SET_H
SMUX_HENAB_RST_L
SMUX_HENAB_RST_H
SMUX_VENAB_SET_L
SMUX_VENAB_SET_H
SMUX_VENAB_RST_L
SMUX_VENAB_RST_H
SMUX_HSYNC_PHASE
SMUX_VSYNC_PHASE
Register Name
Table 14: Sync Mux Registers (Sheet 2 of 2)
0x0202
0x0203
0x0204
0x0205
0x0206
0x0207
0x0208
0x0209
0x020A
0x020B
0x020C
0x020D
0x020E
0x020F
0x0210
Addr
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Mode
[7]
[6]
[5:4]
[3]
[2]
[1]
[0]
[3:0]
[3:0]
[7:0]
[3:0]
[7:0]
[3:0]
[7:0]
[7:0]
[3:0]
[7:0]
[7:0]
[3:0]
[7:0]
[7:0]
Bits
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Default
V_reference toggle output
Software odd set (for testing odd params on
the bench)
Odd_out select
0x0: YUV
0x1: v_reference toggle
0x2: SMUX_CTRL2[6]
0x3: Reserved
Valid_out select
0: YUV
1: valid_generated
Enab_out select
0: enab_internal
1: enab_generated
Vsync_out select
0: vsync_internal
1: hsync_generated
Hsync_out select
0: hsync_internal
1: hsync_generated
ADC clamp signal rising edge [11:0], relative
to selected horizontal reference signal, in
INCLKs (pixels)
ADC clamp falling edge [11:0]
Horizontal enable start [11:0] (left edge of
image) relative to the selected horizontal
reference edge in INCLKs (pixels))
Horizontal enable end [11:0]
Vertical enable start [11:0] (top edge of
image) relative to the selected vertical
reference edge (in lines)
Vertical enable end
Number of horizontal pixels/INCLKs that the
generated hsync edge is from the horizontal
reference edge. 2’s complement
[-128,127]
Number of vertical lines that the generated
vsync edge is from the vertical reference
edge. 2’s complement
[-128,127]
Description
Sync Mux Block
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