ZL50019 ZARLINK [Zarlink Semiconductor Inc], ZL50019 Datasheet - Page 98

• Manufacturer Part Number: ZL50019
• Description: Enhanced 2 K Digital Switch with Stratum 4E DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

† Characteristics are over recommended operating conditions unless otherwise stated.
AC Electrical Characteristics
1
Output Frame Boundary
16.384 Mbps
(4.096 MHz)
2.048 Mbps
4.096 Mbps
8.192 Mbps
STio Delay - Active to Active
@2.048 Mbps
@4.096 Mbps
@8.192 Mbps
@16.384 Mbps
@2.048 Mbps
@4.096 Mbps
@8.192 Mbps
@16.384 Mbps
@2.048 Mbps
@4.096 Mbps
@8.192 Mbps
@16.384 Mbps
STio0 - 31
STio0 - 31
STio0 - 31
STio0 - 31
CKo0
FPo0
Figure 35 - ST-BUS Output Timing Diagram when Operated at 2, 4, 8 or 16 Mbps
Characteristic
Ch255
Bit2
Ch255
Bit1
Ch63
Bit0
Ch31
Bit0
Ch127
Ch255
Bit0
Bit0
†
- ST-BUS/GCI-Bus Output Timing
Bit7
Ch0
t
SOD16
t
Bit7
Ch0
SOD8
Ch0
Bit6
t
t
t
t
Sym.
t
t
t
t
t
t
t
t
t
SOD16
SOD16
SOD16
SOD4
SOD2
SOD4
SOD8
SOD2
SOD4
SOD8
SOD2
SOD4
SOD8
t
SOD2
Ch0
Bit7
Bit5
Ch0
Zarlink Semiconductor Inc.
Ch0
Bit6
Ch0
Bit4
ZL50019
Min.
-6
-6
-6
-6
1
1
1
1
0
0
0
0
Ch0
Bit3
Ch0
Bit7
Bit5
Ch0
98
Typ.
Ch0
Bit2
Bit6
Ch0
Ch0
Bit1
Ch0
Bit4
Max.
Ch0
Bit0
8
8
8
8
6
6
6
6
0
0
0
0
Bit3
Ch0
Bit7
Ch1
Units
Ch1
Bit6
Bit5
Ch0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Ch0
Bit2
Bit5
Ch1
C
Master Mode
Multiplied Slave Mode
Divided Slave Mode
L
Ch1
Bit4
= 30 pF
Ch0
Bit6
Bit1
Ch0
Test Conditions
Bit3
Ch1
Bit4
Ch0
Ch1
Bit2
Ch0
Bit0
Bit1
Ch1
Data Sheet
V
V
V
V
CT
CT
CT
CT