AM79C940JC/W AMD [Advanced Micro Devices], AM79C940JC/W Datasheet - Page 107

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AM79C940JC/W

Manufacturer Part Number
AM79C940JC/W
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
Notes:
1. RXCRS deasserts in less than 3 bit times after last DI rising edge.
2. Start of next packet reception (2 bit times).
3. IVCO is an internal signal shown for clarification only.
Notes:
1. RXCRS deassets in less than 3 bit times after last DI rising edge.
2. IVCO is an internal signal shown for clarification only.
SRDCLK
SRDCLK
RXCRS
RXCRS
IVCO
IVCO
SRD
SRD
DI±
DI±
V ASQ
Bit Cell (n–1)
Bit Cell (n–1)
60
BCC
BCC
AUI Receive Timing–End of Packet (Last Bit = 0)
0
1
AUI Receive Timing–End of Packet (Last Bit = 1)
BCB
BCB
bit (n–1)
Bit Cell (n)
BCC
bit (n–1)
BCC
0
Bit Cell (n)
1
BCB
61
bit (n)
bit (n)
(Note 1)
(Note 1)
61
(Note 2)
16235D-37
16235D-36
107

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