AM79C940JC/W AMD [Advanced Micro Devices], AM79C940JC/W Datasheet - Page 61

• Manufacturer Part Number: AM79C940JC/W
• Manufacturer: AMD [Advanced Micro Devices]

Bit 6
Bit 5
Bit 4
Bit 3-0
CLSN
FRAM
FCS
RCVCNT
[11:8]
to the inability of the host/con-
troller to read data fast enough
to keep pace with the receive se-
rial bit stream and the latency
provided by the Receive FIFO it-
self. OFLO is indicated on the re-
ceive frame that caused the
overflow
frames in the Receive FIFO are
not affected. While the Receive
FIFO is in the overflow condition,
it ignores additional receive data
on the network. The internal ad-
dress detect logic will continue
to operate and the Missed Pack-
et Count (MPC in register 24) will
be incremented for each packet
which passes the address match
criteria, and complete without
collision.
Collision Flag. Indicates that the
receive operation suffered a col-
lision during reception of the
frame. If CLSN is set, it indicates
that the receive frame suffered a
late collision, since a frame ex-
periencing collision within the
slot time will be automatically
deleted from the RCVFIFO (pro-
viding LLRCV in the Receive
Frame
cleared). Note that if the LLRCV
bit is enabled, the late collision
threshold is effectively moved
from the normal 64–byte (512–
bit) level to the 12-byte (96–bit)
level. Runt packets suffering a
collision will be flushed from the
RCVFIFO regardless of the
state of the RPA bit (User Test
Register). CLSN will not be set if
OFLO is set.
Framing Error flag. Indicates
that
contained a non-integer multiple
of bytes and an FCS error. If
there was no FCS error then
FRAM will not be set. FRAM is
not
loopback. FRAM will not be set if
OFLO is set.
FCS Error flag. Indicates that
there is an FCS error in the
frame. The receive FCS is
computed and checked normally
when ASTRP RCV = 1, but is not
passed to the host. FCS will not
be set if OFLO is set.
The Receive Message Byte
Count indicates the number of
whole bytes in the received
valid
the
Control
condition;
received
during
register
complete
internal
frame
Am79C940
is
RFS2—Runt Packet Count (RNTPC)
Bit
Bit 7-0
RFS3—Receive Collision Count (RCVCC)
Bit
Bit 7–0 RCVCC
FIFO Frame Count (FIFOFC)
Bit
Bit 7–4 RCVFC
RCVFC[3–0]
RNTPC [7–0]
RCVCC [7–0]
[7–0]
[3–0]
RNTPC
[7–0]
Name
Name
Name
message from the network.
RCVCNT is 12 bits long, and
valid (accurate) only when there
are no errors reported in the
Receive Status (RCVSTS). If a
late collision is detected (CLSN
set in RCVSTS), the count is an
indication of the length (in byte
times) of the duration of the
receive activity including the
collision. RCVCNT [7:0] corre-
spond to bits 7-0 in RFS0 of the
Receive
RCVCNT [11–0} will be invalid
when OFLO is set.
Description
The
indicates
the number of runt packets
received, addressed to this
node, since the last successfully
received packet. The value does
not roll over after 255 runt
packets have been detected,
and will remain frozen at the
maximum count.
Description
The Receive Collision Count in-
dicates the number of collisions
detected on the network since
the last successfully received
packet. The value does not roll
over after 255 collisions have
been detected, and will remain
frozen at the maximum count.
Description
Receive Frame Count. The
(read
only) count of the frames in the
Receive FIFO. A frame is count-
ed when the last byte is put in
the FIFO. The counter is decre-
mented when the last byte of the
frame is read. If the RCVFC
reaches its maximum value of
XMTFC[3–0]
Runt
Frame
Packet
(REG ADDR 7)
Status.
Count
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