AM79C940JC/W AMD [Advanced Micro Devices], AM79C940JC/W Datasheet - Page 142

• Manufacturer Part Number: AM79C940JC/W
• Manufacturer: AMD [Advanced Micro Devices]

3) Flashing LED for Link Status:
4) Incorrect Runt Packet Count in Low Latency Receive Mode:
5) Device Failure at 1.25 MHz System Clock:
6) False BABL errors generated:
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Status: No current plan to fix this item.
Description: When TMAU receiver is receiving negative polarity link pulse, and the automatic polarity correc-
tion algorithm (DAPC bit in PHY Configuration Control Register) is disabled, link test state machine will loop
between ’link fail’ and ’link pass’ state causing the Link Status LED to flash.
Implication: There is no impact to system performance. However, the Link Status LED flashing may cause
an erroneous interpretation by the user.
Workaround: There is no workaround.
Status: No current plan to fix this item.
Description: In Low Latency Receive mode, the MACE Runt Packet count is incremented when the receive
packet is less than 12 bytes. The correct runt packet count should always be incremented when the receive
packet is less than 64 bytes.
Implication: There is no impact on system performance if the runt packet count is not being utilized by the
system.
Workaround: This condition is being validated at this time. Therefore, a workaround for this is to be deter-
mined.
Description: MACE device does not function reliability at system clock speed of less than 5MHz due to ar-
chitecture constraints.
Implication: There is no performance impact since the serial clock is still running at the IEEE specified
10MHz.
Workarounds:
Status: No current plan to fix this item.
Description: The MACE device will intermittenly give BABL error indications when the network traffic has
frames equal to or greater than 1518 bytes.
Implication: False BABL errors on the receiving station can be passed up to the upper layer software if MACE
device is just coming out of deferral and the multi-purpose counter used to count the number of bytes recevied
reaches 1518 at the same time. If the network is heavily loaded with full-size frames, then the probability of
a false BABL error is high.
Workaround: There are two possible workarounds.
1. Avoid operating the MACE device at speeds of less than 5MHz.
2. Send one packet at a time. Essentially, write one packet to the transmit FIFO, let the Mace device
1. If the user has no intention to transmit frames larger than 1518 bytes, then the BABL bit may be
2. Check to see if the device is transmitting in ISR (Interrupt Service Routine), which is induced by the
transmit that packet, wait for the transmit complete interrupt, before writing another packet to the
transmit FIFO.
masked to ignore babble errors. In this case the false babble error will not cause an interrupt, nor will
it be passed to the higher level software.
BABL error. The BCRs which control the LED settings can be programmed to indicate a transmit ac-
tivity, assuming the interrupt latency is not longer than one mininum IFG (inter-frame gap) time.
Am79C940