K9K1208D0C Samsung semiconductor, K9K1208D0C Datasheet - Page 23

• Manufacturer Part Number: K9K1208D0C
• Description: 64M x 8 Bit / 32M x 16 Bit NAND Flash Memory
• Manufacturer: Samsung semiconductor

The device contains a product identification mode, initiated by writing 90H to the command register, followed by an address input of
00H. Two read cycles sequentially output the manufacture code(ECH), and the device code (6EH) respectively. The command regis-
ter remains in Read ID mode until further commands are issued to it. Figure 9 shows the operation sequence.
RESET
The device offers a reset feature, executed by writing FFH to the command register. When the device is in Busy state during random
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and
the Status Register is cleared to value C0H when WP is high. Refer to table 3 for device status after reset operation. If the device is
already in reset state a new reset command will not be accepted by the command register. The R/B pin transitions to low for t
after the Reset command is written. Reset command is not necessary for normal operation. Refer to Figure 10 below.
Figure 10. RESET Operation
R/B
I/O
Table3. Device Status
K9F8008W0M-TCB0, K9F8008W0M-TIB0
Figure 9. Read ID Operation
CLE
CE
WE
ALE
RE
I/O
READ ID
0
0
~
~
7
7
Operation Mode
FFH
90H
Address. 1 cycle
A
0
~ A
7
:"0"
After Power-up
Read 1
t
AR1
t
RST
t
23
CR
t
REA
Maker code
Dout(ECH)
Waiting for next command
FLASH MEMORY
After Reset
Device code
Dout(6EH)
RST