EX256-FCS100 ETC1 [List of Unclassifed Manufacturers], EX256-FCS100 Datasheet - Page 17

• Manufacturer Part Number: EX256-FCS100
• Description: eX Family FPGAs
• Manufacturer: ETC1 [List of Unclassifed Manufacturers]

e X F a m il y F P GA s
eX F am i l y T i m i ng C ha r a ct er i s t i c s
( W or st -C as e C om m er cia l Cond it ion s V
Parameter
Dedicated (Hard-Wired) Array Clock Networks
t
t
t
t
t
t
f
Routed Array Clock Networks
t
t
t
t
t
t
t
t
t
t
t
Note:
1.
HCKH
HCKL
HPWH
HPWL
HCKSW
HP
HMAX
RCKH
RCKL
RCKH
RCKL
RCKH
RCKL
RPWH
RPWL
RCKSW
RCKSW
RCKSW
Clock skew improves as the clock network becomes more heavily loaded.
1
1
1
Description
Input LOW to HIGH
(Pad to R-Cell Input)
Input HIGH to LOW
(Pad to R-Cell Input)
Minimum Pulse Width HIGH
Minimum Pulse Width LOW
Maximum Skew
Minimum Period
Maximum Frequency
Input LOW to HIGH (Light Load)
(Pad to R-Cell Input) MAX.
Input HIGH to LOW (Light Load)
(Pad to R-Cell Input) MAX.
Input LOW to HIGH (50% Load)
(Pad to R-Cell Input) MAX.
Input HIGH to LOW (50% Load)
(Pad to R-Cell Input) MAX.
Input LOW to HIGH (100% Load)
(Pad to R-Cell Input) MAX.
Input HIGH to LOW (100% Load)
(Pad to R-Cell Input) MAX.
Min. Pulse Width HIGH
Min. Pulse Width LOW
Maximum Skew (Light Load)
Maximum Skew (50% Load)
Maximum Skew (100% Load)
C C A
(Continued)
= 2. 3V , V
v3.0
Min.
1.4
1.4
2.8
1.5
1.5
‘–P’ Speed
C C I
Max.
<0.1
357
1.1
1.1
1.1
1.0
1.2
1.2
1.3
1.3
0.2
0.1
0.1
= 4 .75V , T
Min.
2.0
2.0
4.0
2.1
2.1
‘Std’ Speed
J
= 7 0°C )
Max.
<0.1
250
1.6
1.6
1.6
1.4
1.7
1.7
1.9
1.9
0.3
0.2
0.1
Min.
2.8
2.8
5.6
3.0
3.0
‘–F’ Speed
Max.
<0.1
178
2.3
2.3
2.2
2.0
2.4
2.4
2.6
2.6
0.4
0.3
0.2
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
17