NT5DS16M16CS NANOAMP [NanoAmp Solutions, Inc.], NT5DS16M16CS Datasheet - Page 37

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NT5DS16M16CS

Manufacturer Part Number
NT5DS16M16CS
Description
256Mb DDR Synchronous DRAM
Manufacturer
NANOAMP [NanoAmp Solutions, Inc.]
Datasheet

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NanoAmp Solutions, Inc.
DOC # 14-02-044 Rev A ECN # 01-1116
The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com
Write to Read: Non-Interrupting (CAS Latency = 2; Burst Length = 4)
Command
Command
Address
Address
DQS
DQS
DI a-b = data in for bank a, column b.
3 subsequent elements of data in are applied in the programmed order following DI a-b.
A non-interrupted burst is shown.
t
A10 is Low with the Write command (Auto Precharge is disabled).
The Read and Write commands may be to any bank.
DM
WTR
DQ
DQ
DM
CK
CK
CK
CK
is referenced from the first positive CK edge after the last data in pair.
BAa, COL b
BAa, COL b
Write
Write
T1
T1
t
DQSS
DI a-b
(max)
t
DQSS
NOP
NOP
T2
T2
DI a-b
(min)
NOP
NOP
T3
T3
NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT
NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS
NOP
NOP
T4
T4
t
t
WTR
WTR
BAa, COL n
BAa, COL n
Read
Read
Minimum D
Maximum D
T5
T5
CL = 2
CL = 2
QSS
QSS
NOP
NOP
Don’t Care
T6
T6
37

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