IS42S16100E-6BLI-TR ISSI, IS42S16100E-6BLI-TR Datasheet - Page 28

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IS42S16100E-6BLI-TR

Manufacturer Part Number
IS42S16100E-6BLI-TR
Description
DRAM 16M 1Mx16 166Mhz SDRAM, 3.3v
Manufacturer
ISSI
Datasheet

Specifications of IS42S16100E-6BLI-TR

Rohs
yes
Data Bus Width
16 bit
Organization
1 Mbit x 16
Package / Case
BGA-60
Memory Size
16 Mbit
Maximum Clock Frequency
166 MHz
Access Time
6 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
Maximum Operating Current
180 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Factory Pack Quantity
1000
28
IS42S16100E, IS45S16100E
Read With Auto-Precharge
The read with auto-precharge command first executes a
burst read operation and then puts the selected bank in
the precharged state automatically. After the precharge
completes, the bank goes to the idle state. Thus this
command performs a read command and a precharge
command in a single operation.
During this operation, the delay period (t
last burst data output and the start of the precharge opera-
tion differs depending on the CAS latency setting.
When the CAS latency setting is two, the precharge opera-
tion starts on one clock cycle before the last burst data is
output (t
CAS latency = 3, burstlength = 4
CAS latency = 2, burstlength = 4
COMMAND
COMMAND
pql
READ WITH AUTO-PRECHARGE
READ WITH AUTO-PRECHARGE
CLK
CLK
= –1). When the CAS latency setting is
DQ
DQ
(BANK 0)
(BANK 0)
READA 0
READA 0
pql
D
) between the
OUT
PRECHARGE START
PRECHARGE START
0
D
D
OUT
OUT
0
1
three, the precharge operation starts on two clock cycles
before the last burst data is output (t
the selected bank can be made active after a delay of t
from the start position of this precharge operation.
The selected bank must be set to the active state before
executing this command.
The auto-precharge function is invalid if the burst length
is set to full page.
D
D
OUT
OUT
Integrated Silicon Solution, Inc. — www.issi.com
CAS Latency
t
PQL
1
2
t
pql
t
D
D
RP
OUT
OUT
t
PQL
2
3
t
RP
D
ACT 0
OUT
3
–2
3
pql
= –2). Therefore,
ACT 0
–1
2
05/18/2010
Rev. E
rp

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