IS42S16100E-6BLI-TR ISSI, IS42S16100E-6BLI-TR Datasheet - Page 32

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IS42S16100E-6BLI-TR

Manufacturer Part Number
IS42S16100E-6BLI-TR
Description
DRAM 16M 1Mx16 166Mhz SDRAM, 3.3v
Manufacturer
ISSI
Datasheet

Specifications of IS42S16100E-6BLI-TR

Rohs
yes
Data Bus Width
16 bit
Organization
1 Mbit x 16
Package / Case
BGA-60
Memory Size
16 Mbit
Maximum Clock Frequency
166 MHz
Access Time
6 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
Maximum Operating Current
180 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Factory Pack Quantity
1000
32
IS42S16100E, IS45S16100E
Interval Between Read and Write Commands
A read command can be interrupted and a new write
command executed while the read cycle is in progress,
i.e., before that cycle completes. Data corresponding
to the new write command can be input at the point
new write command is executed. To prevent collision
between input and output data at the DQn pins during
this operation, the
CAS latency = 2, 3, burstlength = 4
COMMAND
U/LDQM
CLK
DQ
READ (CA=A, BANK 0)
READ A0
HI-Z
D
WRITE B0
IN
t
CCD
B0
WRITE (CA=B, BANK 0)
D
IN
B1
D
output data must be masked using the U/LDQM pins.The
interval (t
one clock cycle.
The selected bank must be set to the active state before
executing this command.
IN
B2
Integrated Silicon Solution, Inc. — www.issi.com
ccD
D
IN
) between these commands must be at least
B3
05/18/2010
Rev. E

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