SSTU32864EC/G,551 NXP Semiconductors, SSTU32864EC/G,551 Datasheet - Page 2

IC BUFFER 1.8V 25BIT SOT536-1

SSTU32864EC/G,551

Manufacturer Part Number
SSTU32864EC/G,551
Description
IC BUFFER 1.8V 25BIT SOT536-1
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SSTU32864EC/G,551

Logic Type
1:1, 1:2 Configurable Registered Buffer
Supply Voltage
1.7 V ~ 1.9 V
Number Of Bits
25, 14
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
96-LFBGA
Logic Family
SSTU
Logical Function
Registered Buffer
Number Of Elements
1
Number Of Inputs
25
Number Of Outputs
25
High Level Output Current
-8mA
Low Level Output Current
8mA
Propagation Delay Time
3ns
Operating Supply Voltage (typ)
1.8V
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Frequency (max)
450(Min)MHz
Mounting
Surface Mount
Pin Count
96
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935275429551
SSTU32864EC/G-S
SSTU32864EC/G-S
Philips Semiconductors
2. Features
3. Ordering information
Table 1:
T
9397 750 14092
Product data sheet
Type number
SSTU32864EC/G Pb-free (SnAgCu
SSTU32864EC
amb
= 0 C to +70 C.
Ordering information
Solder process
solder ball compound)
SnPb solder ball
compound
Configurable register supporting DDR2 Registered DIMM applications
Configurable to 25-bit 1:1 mode or 14-bit 1:2 mode
Controlled output impedance drivers enable optimal signal integrity and speed
Exceeds JESD82-7 speed performance (1.8 ns max. single-bit switching propagation
delay; 2.0 ns max. mass-switching)
Supports up to 450 MHz clock frequency of operation
Optimized pinout for high-density DDR2 module design
Chip-selects minimize power consumption by gating data outputs from changing state
Supports SSTL_18 data inputs
Differential clock (CK and CK) inputs
Supports LVCMOS switching levels on the control and RESET inputs
Single 1.8 V supply operation
Available in 96-ball, 13.5
Package
Name
LFBGA96
LFBGA96
1.8 V configurable registered buffer for DDR2 RDIMM applications
Rev. 02 — 22 October 2004
5.5 mm, 0.8 mm ball pitch LFBGA package
Description
plastic low profile fine-pitch ball grid array package;
96 balls; body 13.5
plastic low profile fine-pitch ball grid array package;
96 balls; body 13.5
5.5
5.5
1.05 mm
1.05 mm
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
SSTU32864
Version
SOT536-1
SOT536-1
2 of 21

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