XRT83L38ES Exar, XRT83L38ES Datasheet - Page 18

• Manufacturer Part Number: XRT83L38ES
• Description: Peripheral Drivers & Components - PCIs
• Manufacturer: Exar

Specifications of XRT83L38ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83L38
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
CLKSEL0
CLKSEL1
CLKSEL2
S
N
IGNAL
AME
L
EAD
C8
A8
B8
#
T
YPE
I
Clock Select inputs for Master Clock Synthesizer - Hardware mode
CLKSEL[2:0] are input signals to a programmable frequency synthesizer that can be
used to generate a master clock from an external accurate clock source according to
the table below.
In Hardware mode, the MCLKRATE control signal is generated from the state of
EQC[4:0] inputs.
In Host mode, the state of these pins are ignored and the master frequency PLL is con-
trolled by the corresponding interface bits. See
N
OTE
M CLKE1
204 8
204 8
204 8
154 4
154 4
204 8
kHz
128
128
256
256
16
16
56
56
64
64
8
8
: These pins are internally pulled “Low” with a 50kΩ resistor.
M CLKT1
2048
2048
1544
1544
1544
1544
kHz
X
X
X
X
X
X
X
X
X
X
X
X
CLKSEL2
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
15
CLKSEL1
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D
ESCRIPTION
CLKS EL0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Table 36
M CLKRATE
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
register address 10000001
CLKOUT/
2 048
1 544
2 048
1 544
2 048
1 544
2 048
1 544
2 048
1 544
2 048
1 544
2 048
1 544
2 048
1 544
2 048
1 544
kHz
REV. 1.0.2