XRT83L38ES Exar, XRT83L38ES Datasheet - Page 46

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XRT83L38ES

Manufacturer Part Number
XRT83L38ES
Description
Peripheral Drivers & Components - PCIs
Manufacturer
Exar
Datasheet

Specifications of XRT83L38ES

Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
XRT83L38
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REMOTE LOOP-BACK (RLOOP)
With Remote Loop-Back activated, receive data after the jitter attenuator (if selected in the receive path) is
looped back to the transmit path using RCLK as transmit timing. In this mode transmit clock and data are
ignored, while RCLK and receive data will continue to be available at their respective output pins. Remote
Loop-Back with jitter attenuator selected in the receive path is shown in
In the Remote Loop-Back mode if the jitter attenuator is selected in the transmit path, the receive data from the
Clock and Data Recovery block is looped back to the transmit path and is applied to the jitter attenuator using
RCLK as transmit timing. In this mode the transmit clock and data are also ignored, while RCLK and received
data will continue to be available at their respective output pins. Remote Loop-Back with the jitter attenuator
selected in the transmit path is shown in
F
F
IGURE
IGURE
RNEG
TNEG
RPOS
TPOS
RCLK
TCLK
RNEG
TNEG
RPOS
TPOS
RCLK
TCLK
22. R
21. R
EMOTE
EMOTE
Encoder
Decoder
Encoder
Decoder
L
L
OOP
OOP
Figure
-
BACK MODE WITH JITTER ATTENUATOR SELECTED IN
-
BACK MODE WITH JITTER ATTENUATOR SELECTED IN RECEIVE PATH
JA
22.
JA
43
Recovery
Timing
Control
Timing
Data &
Control
Recovery
Clock
Clock &
Data
Tx
Figure
Tx
Rx
Rx
21.
TTIP
TRING
RTIP
RRING
TTIP
TRING
RTIP
RRING
T
RANSMIT PATH
REV. 1.0.2

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