XRT83L38ES Exar, XRT83L38ES Datasheet - Page 57
XRT83L38ES
Manufacturer Part Number
XRT83L38ES
Description
Peripheral Drivers & Components - PCIs
Manufacturer
Exar
Datasheet
1.XRT83L38ES.pdf
(87 pages)
Specifications of XRT83L38ES
Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
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REV. 1.0.2
D4
D3
D2
D1
D0
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
TXTEST0_n Transmit Test Pattern bit 0: See description of bit D6 for the
LOOP2_n
LOOP1_n
LOOP0_n
TXON_n
T
ABLE
21: M
function of this bit.
Transmitter ON: Writing a “1” into this bit location turns on the
Transmit and Receive Sections of channel n. Writing a “0”
shuts off the Transmit Section of channel n. In this mode,
TTIP_n and TRING_n driver outputs will be tri-stated for power
reduction or redundancy applications.
Loop-Back control bit 2: This bit together with the LOOP1
and LOOP0 bits control the Loop-Back modes of the chip
according to the following table:
Loop-Back control bit 1: See description of bit D2 for the
function of this bit.
Loop-Back control bit 0: See description of bit D2 for the
function of this bit.
LOOP2
ICROPROCESSOR
0
1
1
1
1
LOOP1
X
0
0
1
1
54
R
EGISTER
LOOP0
X
0
1
0
1
#2, B
No Loop-Back
Dual Loop-Back
Analog Loop-Back
Remote Loop-Back
Digital Loop-Back
Loop-Back Mode
IT
D
ESCRIPTION
R/W
R/W
R/W
R/W
XRT83L38
0
0
0
0
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