PCF8576DT/S400/2,1 NXP Semiconductors, PCF8576DT/S400/2,1 Datasheet - Page 18

• Manufacturer Part Number: PCF8576DT/S400/2,1
• Description: LCD Drivers 2.64KHz 50mA 400mW
• Manufacturer: NXP Semiconductors

Specifications of PCF8576DT/S400/2,1

• Rohs: yes
• Maximum Clock Frequency: 2.64 kHz
• Operating Supply Voltage: 1.8 V to 5.5 V
• Package / Case: TSSOP-56
• Maximum Power Dissipation: 400 mW
• Maximum Supply Current: 50 mA
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 2000

NXP Semiconductors
PCF8576D
Product data sheet
7.10 Display RAM
7.9 Backplane outputs
The LCD drive section includes four backplane outputs BP0 to BP3 which must be
connected directly to the LCD. The backplane output signals are generated in accordance
with the selected LCD drive mode. If less than four backplane outputs are required, the
unused outputs can be left open-circuit.
The display RAM is a static 40 × 4-bit RAM which stores LCD data.
There is a one-to-one correspondence between
A logic 1 in the RAM bitmap indicates the on-state of the corresponding LCD element;
similarly, a logic 0 indicates the off-state.
The display RAM bit map,
backplane outputs BP0 to BP3, and the columns 0 to 39 which correspond with the
segment outputs S0 to S39. In multiplexed LCD applications the segment data of the first,
second, third and fourth row of the display RAM are time-multiplexed with BP0, BP1, BP2,
and BP3 respectively.
When display data is transmitted to the PCF8576D, the received display bytes are stored
in the display RAM in accordance with the selected LCD drive mode. The data is stored as
it arrives and depending on the current multiplex drive mode the bits are stored singularly,
Fig 12. Display RAM bit map
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In 1:3 multiplex drive mode, BP3 carries the same signal as BP1, therefore these two
adjacent outputs can be tied together to give enhanced drive capabilities.
In 1:2 multiplex drive mode, BP0 and BP2, respectively, BP1 and BP3 all carry the
same signals and may also be paired to increase the drive capabilities.
In static drive mode the same signal is carried by all four backplane outputs and they
can be connected in parallel for very high drive requirements.
the bits in the RAM bitmap and the LCD elements
the RAM columns and the segment outputs
the RAM rows and the backplane outputs.
backplane outputs
display RAM bits
The display RAM bitmap shows the direct relationship between the display RAM column and the
segment outputs; and between the bits in a RAM row and the backplane outputs.
(rows)/
(BP)
All information provided in this document is subject to legal disclaimers.
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Rev. 13 — 10 May 2012
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Figure
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display RAM addresses (columns)/segment outputs (S)
12, shows the rows 0 to 3 which correspond with the
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Universal LCD driver for low multiplex rates
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PCF8576D
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© NXP B.V. 2012. All rights reserved.
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