PCF8576DT/S400/2,1 NXP Semiconductors, PCF8576DT/S400/2,1 Datasheet - Page 30

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PCF8576DT/S400/2,1

Manufacturer Part Number
PCF8576DT/S400/2,1
Description
LCD Drivers 2.64KHz 50mA 400mW
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCF8576DT/S400/2,1

Rohs
yes
Maximum Clock Frequency
2.64 kHz
Operating Supply Voltage
1.8 V to 5.5 V
Package / Case
TSSOP-56
Maximum Power Dissipation
400 mW
Maximum Supply Current
50 mA
Mounting Style
SMD/SMT
Factory Pack Quantity
2000
NXP Semiconductors
PCF8576D
Product data sheet
After an acknowledgement, one or more command bytes follow, that define the status of
each addressed PCF8576D.
The last command byte sent is identified by resetting its most significant bit, continuation
bit C, (see
PCF8576D on the bus.
After the last command byte, one or more display data bytes may follow. Display data
bytes are stored in the display RAM at the address specified by the data pointer and the
subaddress counter. Both data pointer and subaddress counter are automatically updated
and the data directed to the intended PCF8576D device.
An acknowledgement after each byte is asserted only by the PCF8576Ds that are
addressed via address lines A0, A1, and A2. After the last display byte, the I
master asserts a STOP condition (P). Alternately a START may be asserted to restart an
I
2
Fig 18. I
Fig 19. Format of command byte
C-bus access.
2
S
C-bus protocol
Figure
0 1 1 1 0 0
slave address
All information provided in this document is subject to legal disclaimers.
19). The command bytes are also acknowledged by all addressed
1 byte
Rev. 13 — 10 May 2012
S
A
0
R/W
MSB
0 A C
C
acknowledge by
all addressed
PCF8576Ds
n
COMMAND
≥ 1 byte(s)
REST OF OPCODE
Universal LCD driver for low multiplex rates
A
msa833
DISPLAY DATA
n
LSB
≥ 0 byte(s)
by A0, A1 and A2
update data pointers
subaddress counter
PCF8576D only
PCF8576D
and if necessary,
acknowledge
selected
© NXP B.V. 2012. All rights reserved.
A
P
mdb078
2
C-bus
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