MCIMX6L3DVN10AA Freescale Semiconductor, MCIMX6L3DVN10AA Datasheet - Page 62

• Manufacturer Part Number: MCIMX6L3DVN10AA
• Description: Processors - Application Specialized i.MX6 Megrez
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6L3DVN10AA

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 1 GHz
• Data Ram Size: 128 KB
• Maximum Operating Temperature: + 95 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-432
• Interface Type: I2C, I2S, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: 0 C
• Number Of Timers: 2

Electrical Characteristics
4.10.2.0.2
Figure 30
(P1–P6) that are shown in the figure. In ungated mode the VSYNC and PIXCLK signals are used, and the
HSYNC signal is ignored.
62
P1
P2
P3
P4
P5
P6
P7
P1
P2
P3
P4
P5
P6
ID
ID
Figure 30. CSI Ungated Clock Mode—Sensor Data at Falling Edge, Latch Data at Rising Edge
shows the ungated clock mode timings of CSI, and
CSI VSYNC to HSYNC time
CSI HSYNC setup time
CSI DATA setup time
CSI DATA hold time
CSI pixel clock high time
CSI pixel clock low time
CSI pixel clock frequency
CSI VSYNC to pixel clock time
CSI DATA setup time
CSI DATA hold time
CSI pixel clock high time
CSI pixel clock low time
CSI pixel clock frequency
Ungated Clock Mode Timing
DATA[15:0]
VSYNC
PIXCLK
i.MX 6SoloLite Applications Processors for Consumer Products, Rev. 1
Table 46. CSI Ungated Clock Mode Timing Parameters
Parameter
Parameter
Table 45. CSI Gated Clock Mode Timing Parameters
P1
P2
P3
tVSYNC
Symbol
Symbol
tCLKh
tCLKh
tCLKl
tCLKl
tV2H
fCLK
fCLK
tHsu
tDsu
tDsu
tDh
tDh
Table 46
P4
P6
P5
Min.
Min.
67.5
67.5
describes the timing parameters
2.5
1.2
2.5
1.2
10
10
10
10
—
—
2
66
66
Freescale Semiconductor
Max.
Max.
±
±
—
—
—
—
—
—
—
—
—
—
—
10%
10%
Units
Units
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns