MCIMX6L3DVN10AA Freescale Semiconductor, MCIMX6L3DVN10AA Datasheet - Page 72

• Manufacturer Part Number: MCIMX6L3DVN10AA
• Description: Processors - Application Specialized i.MX6 Megrez
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6L3DVN10AA

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 1 GHz
• Data Ram Size: 128 KB
• Maximum Operating Temperature: + 95 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-432
• Interface Type: I2C, I2S, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: 0 C
• Number Of Timers: 2

Electrical Characteristics
4.10.5.5 RMII Mode Timing
In RMII mode, FEC_TX_CLK is used as the REF_CLK which is a 50 MHz ±50 ppm continuous reference
clock. FEC_RX_DV is used as the CRS_DV in RMII, and other signals under RMII mode include
FEC_TX_EN, FEC_TXD[1:0], FEC_RXD[1:0] and optional FEC_RX_ER.
The RMII mode timings are shown in
72
1
M13 FEC_MDIO (input) to FEC_MDC rising edge hold
M14 FEC_MDC pulse width high
M15 FEC_MDC pulse width low
ID
Test conditions: 25pF on each output signal.
M16
M17
M18
M19
No.
FEC_MDIO (output)
FEC_MDC (output)
FEC_MDIO (input)
REF_CLK(FEC_TX_CLK) pulse width high
REF_CLK(FEC_TX_CLK) pulse width low
REF_CLK to FEC_TXD[1:0], FEC_TX_EN invalid
REF_CLK to FEC_TXD[1:0], FEC_TX_EN valid
i.MX 6SoloLite Applications Processors for Consumer Products, Rev. 1
Figure 39. MII Serial Management Channel Timing Diagram
Table 55. MII Transmit Signal Timing (continued)
Characteristics
Characteristics
Table 56
Table 56. RMII Signal Timing
M12
1
and
M13
1
Figure
M14
40.
35%
35%
M10
Min
—
2
M11
M15
65%
65%
Max
16
—
Min Max
40
40
%
%
0
REF_CLK period
REF_CLK period
ns
ns
Freescale Semiconductor
60% FEC_MDC period
60% FEC_MDC period
—
Unit
Unit
ns