MCIMX6U5EVM10AB Freescale Semiconductor, MCIMX6U5EVM10AB Datasheet - Page 126
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MCIMX6U5EVM10AB
Manufacturer Part Number
MCIMX6U5EVM10AB
Description
Processors - Application Specialized i.MX6 DualLite
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet
1.MCIMX6S5DVM10AB.pdf
(167 pages)
Specifications of MCIMX6U5EVM10AB
Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
1 GHz
Data Ram Size
128 KB
Operating Supply Voltage
1.175 V to 1.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-624
Interface Type
I2C, I2S, UART, USB
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 20 C
Number Of Timers
2
Available stocks
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Company:
Part Number:
MCIMX6U5EVM10AB
Manufacturer:
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Electrical Characteristics
126
SS42
SS43
ID
SRXD hold after (Tx) CK falling
SRXD setup before (Tx) CK falling
•
•
•
•
•
i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 1
All the timings for the SSI are given for a non-inverted serial clock
polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have
been inverted, all the timing remains valid by inverting the clock signal
STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables
and in the figures.
All timings are on Audiomux Pads when SSI is being used for data
transfer.
The terms, WL and BL, refer to Word Length (WL) and Bit Length
(BL).
“Tx” and “Rx” refer to the Transmit and Receive sections of the SSI.
For internal Frame Sync operation using external clock, the FS timing is
same as that of Tx Data (for example, during AC97 mode of operation).
Table 78. SSI Transmitter Timing with Internal Clock (continued)
Parameter
Synchronous Internal Clock Operation
NOTE
10.0
Min
0.0
Max
Freescale Semiconductor
—
—
Unit
ns
ns
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