MCIMX6U5EVM10AB Freescale Semiconductor, MCIMX6U5EVM10AB Datasheet - Page 150
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MCIMX6U5EVM10AB
Manufacturer Part Number
MCIMX6U5EVM10AB
Description
Processors - Application Specialized i.MX6 DualLite
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet
1.MCIMX6S5DVM10AB.pdf
(167 pages)
Specifications of MCIMX6U5EVM10AB
Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
1 GHz
Data Ram Size
128 KB
Operating Supply Voltage
1.175 V to 1.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-624
Interface Type
I2C, I2S, UART, USB
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 20 C
Number Of Timers
2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCIMX6U5EVM10AB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCIMX6U5EVM10AB
Manufacturer:
FREESCALE
Quantity:
20 000
Package Information and Contact Assignments
150
DRAM_SDCLK_0_B AE15
DRAM_SDCLK_1_B AE14
DRAM_SDQS0_B
DRAM_SDQS1_B
DRAM_SDQS2_B
DRAM_SDQS3_B
DRAM_SDCLK_0
DRAM_SDCLK_1
DRAM_SDCKE0
DRAM_SDCKE1
DRAM_SDODT0
DRAM_SDODT1
DRAM_RESET
DRAM_SDQS0
DRAM_SDQS1
DRAM_SDQS2
DRAM_SDQS3
DRAM_SDQS4
DRAM_SDBA0
DRAM_SDBA1
DRAM_SDBA2
DRAM_DQM0
DRAM_DQM1
DRAM_DQM2
DRAM_DQM3
DRAM_DQM4
DRAM_DQM5
DRAM_DQM6
DRAM_DQM7
DRAM_RAS
Ball Name
i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 1
AC20
AD24
AC15
AD15
AD14
AC16
AC10
AD18
AE10
AB18
AB15
AB12
AA11
AB17
AB10
Table 92. 21 x 21 mm Functional Contact Assignments
AD3
AD6
AD8
Ball
AC3
AC6
AB8
AE3
AE6
AE8
Y21
Y15
Y11
Y6
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
Power Group
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
Type
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
Ball
Default
(Reset
Mode)
Mode
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
mmdc.DRAM_SDCKE[0] Output
mmdc.DRAM_SDCKE[1] Output
mmdc.DRAM_SDCLK0
mmdc.DRAM_SDCLK1
mmdc.DRAM_SDQS[0]
mmdc.DRAM_SDQS[1]
mmdc.DRAM_SDQS[2]
mmdc.DRAM_SDQS[3]
mmdc.DRAM_SDQS[4]
mmdc.DRAM_SDBA[0]
mmdc.DRAM_SDBA[1]
mmdc.DRAM_SDBA[2]
mmdc.DRAM_DQM[5]
mmdc.DRAM_DQM[7]
mmdc.DRAM_DQM[0]
mmdc.DRAM_DQM[1]
mmdc.DRAM_DQM[2]
mmdc.DRAM_DQM[3]
mmdc.DRAM_DQM[4]
mmdc.DRAM_DQM[6]
mmdc.DRAM_RESET
mmdc.DRAM_ODT[0]
mmdc.DRAM_ODT[1]
DRAM_SDCLK_0_B
DRAM_SDCLK_1_B
mmdc.DRAM_RAS
DRAM_SDQS0_B
DRAM_SDQS1_B
DRAM_SDQS2_B
DRAM_SDQS3_B
Default Function
Out of Reset Condition
1
(continued)
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Outpu
Input/
Freescale Semiconductor
Input
Input
Input
Input
Input
t
-
-
-
-
-
-
2
Value
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
-
-
-
-
-
-