MCIMX6U5EVM10AB Freescale Semiconductor, MCIMX6U5EVM10AB Datasheet - Page 68

• Manufacturer Part Number: MCIMX6U5EVM10AB
• Description: Processors - Application Specialized i.MX6 DualLite
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6U5EVM10AB

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 1 GHz
• Data Ram Size: 128 KB
• Operating Supply Voltage: 1.175 V to 1.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-624
• Interface Type: I2C, I2S, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 20 C
• Number Of Timers: 2

Electrical Characteristics
1
2) AS minimum value could be 0, while DS/DH minimum value is 1.
3) T represents for the GPMI clock period.
In EDO mode
They are called tREA/tRHOH (RE# access time/RE# HIGH to output hold). The typical value for them
are 16 ns (max for tREA)/15 ns (min for tRHOH) at 50 MB/s EDO mode. In EDO mode, GPMI will
sample IO[7:0] at rising edge of delayed RE provided by an internal DPLL. The delay value can be
controlled by GPMI_CTRL1.RDN_DELAY (see the GPMI chapter of the i.MX 6Solo/6DualLite
reference manual). The typical value of this control register is 0x8 at 50 MT/s EDO mode. But if the board
delay is big enough and cannot be ignored, the delay value should be made larger to compensate the board
delay.
68
GPMI’s Async Mode output timing could be controlled by module’s internal registers, say
HW_GPMI_TIMING0_ADDRESS_SETUP, HW_GPMI_TIMING0_DATA_SETUP, and HW_GPMI_TIMING0_DATA_HOLD.
This AC timing depends on these registers’ settings. In the above table, we use AS/DS/DH to represent each of these settings.
NF10
NF11
NF12
NF13
NF14
NF15
NF16
NF17
NF5
NF6
NF7
NF8
NF9
ID
WE pulse width
Write cycle time
WE hold time
Ready to RE low
RE pulse width
READ cycle time
RE high hold time
Data setup on read
Data hold on read
ALE setup time
ALE hold time
Data setup time
Data hold time
(Figure
Parameter
i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 1
Table 47. Asynchronous Mode Timing Parameters
31), NF16/NF17 are different from the definition in non-EDO mode
Symbol
tREH
tDSR
tDHR
tALH
tALS
tWC
tWH
tWP
tDS
tDH
tRR
tRP
tRC
(DS+DH) x T
(DH+1) x T
(AS+1) x T
(AS+1) x T
T = GPMI Clock Cycle
DS x T
DH x T
DS x T
Min.
(DS+DH) x T
Timing
DS x T
DH x T
DH x T
N/A
N/A
Max.
—
—
—
—
—
—
—
1
(continued)
GPMI Clock
Example Timing for
Min.
10
20
10
10
10
10
20
10
10
10
T = 10 ns
10
20
10
≈ 100
Freescale Semiconductor
Max.
—
—
—
—
—
—
—
—
—
—
MHz
(Figure
Unit
30).
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns