C8051F989-GUR Silicon Labs, C8051F989-GUR Datasheet - Page 160
C8051F989-GUR
Manufacturer Part Number
C8051F989-GUR
Description
8-bit Microcontrollers - MCU 4kB 512B RAM
Manufacturer
Silicon Labs
Datasheet
1.C8051F986-GUR.pdf
(322 pages)
Specifications of C8051F989-GUR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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C8051F99x-C8051F98x
SFR Definition 14.5. FLSCL: Flash Scale
SFR Page = All; SFR Address = 0xB7
SFR Definition 14.6. FLWR: Flash Write Only
SFR Page = All; SFR Address = 0xE5
160
Note: Operations which clear the BYPASS bit do not need to be immediately followed by a benign 3-byte instruction.
Name
Reset
Name
Reset
Bit
5:0
Bit
7:0
Type
Type
7
6
Bit
Bit
For code compatibility with C8051F930/31/20/21 devices, a benign 3-byte instruction whose third byte is a
don't care should follow the clear operation. See the C8051F93x-C8051F92x data sheet for more details.
FLWR[7:0] Flash Write Only.
Reserved
Reserved
BYPASS
Name
Name
R
7
0
7
0
Always Write to 0.
Flash Read Timing One-Shot Bypass.
0: The one-shot determines the Flash read time. This setting should be used for oper-
ating frequencies less than 14 MHz.
1: The system clock determines the Flash read time. This setting should be used for
frequencies greater than 14 MHz.
Reserved. Always Write to 000000.
All writes to this register have no effect on system operation.
BYPASS
R/W
6
0
6
0
R
5
0
5
0
Rev. 1.1
R
4
0
4
0
FLWR[7:0]
W
Function
Function
R
3
0
3
0
R
2
0
2
0
R
1
0
1
0
R
0
0
0
0
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