C8051F989-GUR Silicon Labs, C8051F989-GUR Datasheet - Page 229
C8051F989-GUR
Manufacturer Part Number
C8051F989-GUR
Description
8-bit Microcontrollers - MCU 4kB 512B RAM
Manufacturer
Silicon Labs
Datasheet
1.C8051F986-GUR.pdf
(322 pages)
Specifications of C8051F989-GUR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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SFR Definition 21.13. P1: Port1
SFR Page = All; SFR Address = 0x90; Bit-Addressable
SFR Definition 21.14. P1SKIP: Port1 Skip
SFR Page = 0x0; SFR Address = 0xD5
Name
Reset
Name
Reset
Type
Type
Bit
7:0
7:0
Bit
Bit
Bit
P1SKIP[6:0] Port 1 Crossbar Skip Enable Bits.
Name
P1[6:0]
Name
7
1
7
0
Port 1 Data.
Sets the Port latch logic
value or reads the Port pin
logic state in Port cells con-
figured for digital I/O.
These bits select Port 1 pins to be skipped by the Crossbar Decoder. Port pins used
for analog, special functions or GPIO should be skipped by the Crossbar.
0: Corresponding P1.n pin is not skipped by the Crossbar.
1: Corresponding P1.n pin is skipped by the Crossbar.
6
1
6
0
Description
5
1
5
0
Rev. 1.1
4
1
4
0
0: Set output latch to logic
LOW.
1: Set output latch to logic
HIGH.
P1SKIP[7:0]
P1[7:0]
R/W
R/W
C8051F99x-C8051F98x
Function
Write
3
1
3
0
2
1
2
0
0: P1.n Port pin is logic
LOW.
1: P1.n Port pin is logic
HIGH.
1
1
1
0
Read
0
1
0
0
229
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