C8051F989-GUR Silicon Labs, C8051F989-GUR Datasheet - Page 269
C8051F989-GUR
Manufacturer Part Number
C8051F989-GUR
Description
8-bit Microcontrollers - MCU 4kB 512B RAM
Manufacturer
Silicon Labs
Datasheet
1.C8051F986-GUR.pdf
(322 pages)
Specifications of C8051F989-GUR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
- Current page: 269 of 322
- Download datasheet (2Mb)
24.6. SPI Special Function Registers
SPI0 is accessed and controlled through four special function registers in the system controller: SPI0CN
Control Register, SPI0DAT Data Register, SPI0CFG Configuration Register, and SPI0CKR Clock Rate
Register. The four special function registers related to the operation of the SPI0 Bus are described in the
following figures.
SCK
(CKPOL=0, CKPHA=1)
SCK
(CKPOL=1, CKPHA=1)
MOSI
MISO
NSS (4-Wire Mode)
Figure 24.7. Slave Mode Data/Clock Timing (CKPHA = 1)
MSB
MSB
Bit 6
Bit 6
Bit 5
Bit 5
Rev. 1.1
Bit 4
Bit 4
C8051F99x-C8051F98x
Bit 3
Bit 3
Bit 2
Bit 2
Bit 1
Bit 1
Bit 0
Bit 0
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