C8051F989-GUR Silicon Labs, C8051F989-GUR Datasheet - Page 245
C8051F989-GUR
Manufacturer Part Number
C8051F989-GUR
Description
8-bit Microcontrollers - MCU 4kB 512B RAM
Manufacturer
Silicon Labs
Datasheet
1.C8051F986-GUR.pdf
(322 pages)
Specifications of C8051F989-GUR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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SFR Definition 22.3. SMB0ADR: SMBus Slave Address
SFR Page = 0x0; SFR Address = 0xF4
SFR Definition 22.4. SMB0ADM: SMBus Slave Address Mask
SFR Page = 0x0; SFR Address = 0xF5
Name
Reset
Name
Reset
Bit
7
Bit
7
Type
Type
0
0
Bit
:
Bit
:
1
1
SLVM[6:0]
SLV[6:0]
EHACK
Name
Name
GC
7
0
7
1
SMBus Hardware Slave Address.
Defines the SMBus Slave Address(es) for automatic hardware acknowledgement.
Only address bits which have a 1 in the corresponding bit position in SLVM[6:0]
are checked against the incoming address. This allows multiple addresses to be
recognized.
General Call Address Enable.
When hardware address recognition is enabled (EHACK = 1), this bit will deter-
mine whether the General Call Address (0x00) is also recognized by hardware.
0: General Call Address is ignored.
1: General Call Address is recognized.
SMBus Slave Address Mask.
Defines which bits of register SMB0ADR are compared with an incoming address
byte, and which bits are ignored. Any bit set to 1 in SLVM[6:0] enables compari-
sons with the corresponding bit in SLV[6:0]. Bits set to 0 are ignored (can be either
0 or 1 in the incoming address).
Hardware Acknowledge Enable.
Enables hardware acknowledgement of slave address and received data bytes.
0: Firmware must manually acknowledge all incoming address and data bytes.
1: Automatic Slave Address Recognition and Hardware Acknowledge is Enabled.
6
0
6
1
5
0
5
1
SLVM[6:0]
SLV[6:0]
R/W
R/W
Rev. 1.1
4
0
4
1
C8051F99x-C8051F98x
Function
Function
3
0
3
1
2
0
2
1
1
0
1
1
EHACK
R/W
R/W
GC
0
0
0
0
245
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