C8051F989-GUR Silicon Labs, C8051F989-GUR Datasheet - Page 40
C8051F989-GUR
Manufacturer Part Number
C8051F989-GUR
Description
8-bit Microcontrollers - MCU 4kB 512B RAM
Manufacturer
Silicon Labs
Datasheet
1.C8051F986-GUR.pdf
(322 pages)
Specifications of C8051F989-GUR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3. This Land Pattern Design is based on IPC-SM-782 guidelines.
4. All dimensions shown are at Maximum Material Condition (MMC). Least Material
1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should
2. The stencil thickness should be 0.125 mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
4. A 1.45 x 1.45 mm square aperture should be used for the center pad. This provides
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification
Condition (LMC) is calculated based on a Fabrication Allowance of 0.05 mm.
solder mask and the metal pad is to be 60 µm minimum, all the way around the pad.
be used to assure good solder paste release.
approximately 70% solder paste coverage on the pad, which is optimum to assure
correct component stand-off.
for Small Body Components.
Dimension
GD
GE
D2
ZE
ZD
E2
W
D
E
X
Y
e
f
Table 3.3. PCB Land Pattern
Rev. 1.1
1.60
1.60
2.10
2.10
Min
—
—
—
—
0.50 BSC
2.71 REF
2.71 REF
2.53 REF
0.61 REF
Max
1.80
1.80
0.34
0.28
3.31
3.31
—
—
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