AT26F004-MU Atmel, AT26F004-MU Datasheet - Page 21
![IC FLASH 4MBIT 33MHZ 8QFN](/photos/7/26/72647/8-vfqfn-8m1-a_sml.jpg)
AT26F004-MU
Manufacturer Part Number
AT26F004-MU
Description
IC FLASH 4MBIT 33MHZ 8QFN
Manufacturer
Atmel
Datasheet
1.AT26F004-MU.pdf
(38 pages)
Specifications of AT26F004-MU
Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
4M (2048 pages x 256 bytes)
Speed
33MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-VFQFN, 8-VFQFPN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT26F004-MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
10.1.6
3588D–DFLASH–10/08
RDY/BSY Bit
If the WEL bit is in the logical “1” state, it will not be reset to a logical “0” if an operation aborts
due to an incomplete or unrecognized opcode being clocked into the device before the CS pin is
deasserted. In order for the WEL bit to be reset when an operation aborts prematurely, the entire
opcode for a program, erase, Protect Sector, Unprotect Sector, or Write Status Register com-
mand must have been clocked into the device.
The RDY/BSY bit is used to determine whether or not an internal operation, such as a program
or erase, is in progress. To poll the RDY/BSY bit to detect the completion of a program or erase
cycle, new Status Register data must be continually clocked out of the device until the state of
the RDY/BSY bit changes from a logical “1” to a logical “0”.
Figure 10-1. Read Status Register
• Block Erase operation completes successfully or aborts
• Chip Erase operation completes successfully or aborts
SCK
SO
CS
SI
HIGH-IMPEDANCE
MSB
0
0
0
1
0
2
OPCODE
0
3
0
4
1
5
0
6
1
7
MSB
D
STATUS REGISTER DATA
8
D
9
D
10 11
D
D
12
D
13 14
D
D
15 16
MSB
D
STATUS REGISTER DATA
D
17
D
18
D
19
D
20
D
21 22
D
AT26F004
D
23 24
MSB
D
D
21