ZLF645S0Q2032G Maxim Integrated, ZLF645S0Q2032G Datasheet - Page 54
![no-image](/images/no-image-200.jpg)
ZLF645S0Q2032G
Manufacturer Part Number
ZLF645S0Q2032G
Description
8-bit Microcontrollers - MCU Crimzon Flash Infrared MCU
Manufacturer
Maxim Integrated
Datasheet
1.ZLF645E0H4864G2204.pdf
(201 pages)
Specifications of ZLF645S0Q2032G
Core
Z8
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Program Memory Size
32 KB
Data Ram Size
1 KB
On-chip Adc
No
Operating Supply Voltage
2 V to 3.6 V
Package / Case
QFN-EP-20
Mounting Style
SMD/SMT
Interface Type
UART
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Number Of Programmable I/os
5
Number Of Timers
2 x 8 bit, 1 x 16 bit
On-chip Dac
No
Processor Series
ZLF645
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2 V
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PS026408-1208
Note:
Example
For example, the following code uses linear addressing for the source of a register transfer
operation and uses a working register address for the target:
The LDE and LDEI instructions that existed in the Z8 CPU are no longer valid; they have
been replaced by the LDX and LDXI instructions.
SRP #%23
LD R0, #%55
SRP #%12
LD R6, #%03
LD R7, #%20
LD R0, @RR6
In the above code, the source register is referred through a linear address value contained
within registers R6 and R7, whereas the destination is referenced via the SRP setting and a
working register. For more information about instructions on the usage of LDX and LDXI
instructions, refer to Z8
;Set working register group 2 in bank 3
;Load 55 into working register R0 in the current
;group and bank (linear address 320h)
;Set working register group 1 in bank 2
;Load high byte of source linear address (0320h)
;Load low byte of source linear address (0320h)
;Load linear address 320h contents (55h) into
;working register R0 in the current group and
;bank (linear address 210h)
®
LXMC CPU Core User Manual (UM0215).
ZLF645 Series Flash MCUs
Product Specification
Register File
46
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