C8051F045R Silicon Labs, C8051F045R Datasheet - Page 110
![no-image](/images/no-image-200.jpg)
C8051F045R
Manufacturer Part Number
C8051F045R
Description
8-bit Microcontrollers - MCU 25 MIPS 64KB 10ADC
Manufacturer
Silicon Labs
Datasheet
1.C8051F044R.pdf
(328 pages)
Specifications of C8051F045R
Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
4.25 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Package / Case
TQFP-64
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
13
Data Rom Size
64 KB
Interface Type
CAN, SMBus, SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
32
Number Of Timers
16 bit
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
500
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
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C8051F040/1/2/3/4/5/6/7
110
Bit7:
Bits6-5:
Bits4-3:
Bits2-0:
DAC1EN
MSB
R/W
Bit7
MSB
DAC1EN: DAC1 Enable Bit.
0: DAC1 Disabled. DAC1 Output pin is disabled; DAC1 is in low-power shutdown mode.
1: DAC1 Enabled. DAC1 Output pin is active; DAC1 is operational.
UNUSED. Read = 00b; Write = don’t care.
DAC1MD1-0: DAC1 Mode Bits:
00: DAC output updates occur on a write to DAC1H.
01: DAC output updates occur on Timer 3 overflow.
10: DAC output updates occur on Timer 4 overflow.
11: DAC output updates occur on Timer 2 overflow.
DAC1DF2: DAC1 Data Format Bits:
000:
001:
010:
011:
1xx:
MSB
R/W
Bit6
-
The most significant nibble of the DAC1 Data Word is in DAC1H[3:0], while the least
significant byte is in DAC1L.
The most significant 5-bits of the DAC1 Data Word is in DAC1H[4:0], while the least
significant 7-bits are in DAC1L[7:1].
The most significant 6-bits of the DAC1 Data Word is in DAC1H[5:0], while the least
significant 6-bits are in DAC1L[7:2].
The most significant 7-bits of the DAC1 Data Word is in DAC1H[6:0], while the least
significant 5-bits are in DAC1L[7:3].
The most significant 8-bits of the DAC1 Data Word is in DAC1H[7:0], while the least
significant 4-bits are in DAC1L[7:4].
MSB
DAC1H
DAC1H
DAC1H
DAC1H
DAC1H
SFR Definition 8.6. DAC1CN: DAC1 Control
R/W
Bit5
MSB
-
DAC1MD1 DAC1MD0 DAC1DF2 DAC1DF1 DAC1DF0 00000000
R/W
Bit4
Rev. 1.5
R/W
Bit3
R/W
Bit2
LSB
R/W
Bit1
DAC1L
DAC1L
DAC1L
DAC1L
DAC1L
LSB
SFR Page:
R/W
Address:
Bit0
LSB
SFR
LSB
0xD4
1
Reset Value
LSB
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