C8051F045R Silicon Labs, C8051F045R Datasheet - Page 233

• Manufacturer Part Number: C8051F045R
• Description: 8-bit Microcontrollers - MCU 25 MIPS 64KB 10ADC
• Manufacturer: Silicon Labs

Specifications of C8051F045R

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 4.25 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Package / Case: TQFP-64
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 13
• Data Rom Size: 64 KB
• Interface Type: CAN, SMBus, SPI, UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 500
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

CAN Register
Index
0x0A
0x0B
0x0C
0x0D
0x0E
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x08
0x09
0x0F
0x10
0x12
0x20
0x21
0x22
0x23
0x24
0x25
0x11
CAN Control Register
Status Register
Error Register
Bit Timing Register
Interrupt Register
Test Register
BRP Extension Register
IF1 Command Request
IF1 Command Mask
IF1 Mask 1
IF1 Mask 2
IF1 Arbitration 1
IF1 Arbitration 2
IF1 Message Control
IF1 Data A1
IF1 Data A2
IF1 Data B1
IF1 Data B2
IF2 Command Request
IF2 Command Mask
IF2 Mask 1
IF2 Mask 2
IF2 Arbitration 1
IF2 Arbitration 2
Table 18.2. CAN Register Index and Reset Values
Register Name
0xFFFF
0xFFFF
0xFFFF
0xFFFF
0x0001
0x0000
0x0000
0x2301
0x0000
0x0000
0x0000
0x0001
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0001
0x0000
0x0000
0x0000
Reset
Value
Rev. 1.5
C8051F040/1/2/3/4/5/6/7
Accessible in CIP-51 SFR Map
Accessible in CIP-51 SFR Map
Read Only
Write Enabled by CCE Bit in CAN0CN
Read Only
Bit 7 (RX) is determined by CAN bus
Write Enabled by TEST bit in CAN0CN
CAN0ADR autoincrements in IF1 index space
(0x08 - 0x12) upon write to CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrements in IF2 index space
(0x20 - 0x2A) upon write to CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
CAN0ADR autoincrement upon write to
CAN0DATL
Notes
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