C8051F045R Silicon Labs, C8051F045R Datasheet - Page 228
![no-image](/images/no-image-200.jpg)
C8051F045R
Manufacturer Part Number
C8051F045R
Description
8-bit Microcontrollers - MCU 25 MIPS 64KB 10ADC
Manufacturer
Silicon Labs
Datasheet
1.C8051F044R.pdf
(328 pages)
Specifications of C8051F045R
Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
4.25 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Package / Case
TQFP-64
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
13
Data Rom Size
64 KB
Interface Type
CAN, SMBus, SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
32
Number Of Timers
16 bit
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
500
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
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C8051F040/1/2/3/4/5/6/7
18.1. Bosch CAN Controller Operation
The CAN Controller featured in the C8051F04x family of devices is a full implementation of Bosch’s full
CAN module and fully complies with CAN specification 2.0B. A block diagram of the CAN controller is
shown in Figure 18.2. The CAN Core provides shifting (CANTX and CANRX), serial/parallel conversion of
messages, and other protocol related tasks such as transmission of data and acceptance filtering. The
message RAM stores 32 message objects which can be received or transmitted on a CAN network. The
CAN registers and message handler provide an interface for data transfer and notification between the
CAN controller and the CIP-51.
The function and use of the CAN Controller is detailed in the Bosch CAN User’s Guide. The User’s Guide
should be used as a reference to configure and use the CAN controller. This Silicon Labs data sheet
describes how to access the CAN controller.
The CAN Controller is typically initialized using the following steps:
The CAN Control Register (CAN0CN), CAN Test Register (CAN0TST), and CAN Status Register
(CAN0STA) in the CAN controller can be accessed directly or indirectly via CIP-51 SFR’s. All other CAN
registers must be accessed via an indirect indexing method described in
CAN0ADR, CAN0DATH, and CANDATL to Access CAN Registers” on page
228
Step 1. Set the SFRPAGE register to CAN0_PAGE.
Step 2. Set the INIT the CCE bits to ‘1’ in the CAN0CN Register. See the CAN User’s Guide for bit
Step 3. Set timing parameters in the Bit Timing Register and the BRP Extension Register.
Step 4. Initialize each message object or set it’s MsgVal bit to NOT VALID.
Step 5. Reset the INIT bit to ‘0’.
definitions.
CANTX
TX
(32 Message Objects)
Figure 18.2. CAN Controller Diagram
Message RAM
Core
CAN
Message Handler
CANRX
RX
Rev. 1.5
CAN Controller
REGISTERS
Prescaler
BRP
Interrupt
CAN_CLK
(f
sys
)
C8051F04x
232.
Section “18.2.5. Using
CIP-51
C
S
Y
S
L
K
R
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S
F
MCU
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