MT47H64M8CB-3:B Micron Technology Inc, MT47H64M8CB-3:B Datasheet - Page 27

IC DDR2 SDRAM 512MBIT 3NS 60FBGA

MT47H64M8CB-3:B

Manufacturer Part Number
MT47H64M8CB-3:B
Description
IC DDR2 SDRAM 512MBIT 3NS 60FBGA
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT47H64M8CB-3:B

Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
512M (64M x 8)
Speed
3ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
60-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Figure 12:
Extended Mode Register 2
Figure 13:
PDF: 09005aef8117c18e, Source: 09005aef8211b2e6
512MbDDR2_2.fm - Rev. K 8/06 EN
COMMAND
DQS, DQS#
CK#
DQ
CK
WRITE Latency
ACTIVE n
Extended Mode Register 2 (EMR2) Definition
T0
Notes:
Notes:
1. BL = 4.
2. CL = 3.
3. AL = 2.
4. WL = AL + CL - 1 = 4.
The extended mode register 2 (EMR2) controls functions beyond those controlled by the
mode register. Currently all bits in EMR2 are reserved, except for E7, which is for
commercial or high-temperature operations, as shown in Figure 13. The EMR2 is
programmed via the LM command and will retain the stored information until it is
programmed again or the device loses power. Reprogramming the EMR will not alter the
contents of the memory array, provided it is performed correctly.
Bit E7 (A7) must be programmed as “1” to provide a faster refresh rate on IT devices if the
T
EMR2 must be loaded when all banks are idle and no bursts are in progress, and the
controller must wait the specified time
tion. Violating either of these requirements could result in unspecified operation.
1. E13 (A13)–E8 (A8) and E6 (A6)–E0 (A0) are reserved for future use and must all be pro-
WRITE n
M15
BA1
15
CASE
EMR2
0
0
1
1
T1
grammed to “0.” A13 is not used in x16 configuration.
M14
14
BA0
t
0
1
0
1
RCD (MIN)
exceeds 85°C.
0
13
A13
1
Extended mode register (EMR2)
Extended mode register (EMR3)
Extended mode register (EMR)
0
12
Mode Register Definition
A12 A11
1
Mode register (MR)
0
11
AL = 2
1
NOP
T2
0
10
1
A10
0
9
A9
1
0
1
8
A8
WL = AL + CL - 1 = 4
0
7
1
A7 A6 A5 A4 A3
NOP
0
T3
1
6
27
0
5
1
E7
0
1
0
4
1
High Temperature Self Refresh rate enable
Commercial temperature default
Industrial temperature option;
use if T
0
1
3
0
C
CL - 1 = 2
2
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
exceeds 85°C
t
A2 A1 A0
NOP
MRD before initiating any subsequent opera-
T4
0
1
1
0
0
1
512Mb: x4, x8, x16 DDR2 SDRAM
Extended Mode
Register (Ex)
Address Bus
NOP
D
T5
n
IN
Extended Mode Register 2
TRANSITIONING DATA
n + 1
D
IN
©2004 Micron Technology, Inc. All rights reserved.
n + 2
NOP
D
T6
IN
n + 3
D
IN
DON’T CARE
NOP
T7

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