L6740LTR STMicroelectronics, L6740LTR Datasheet - Page 33

• Manufacturer Part Number: L6740LTR
• Description: IC HYBRID CONTROLLERS 48TQFP
• Manufacturer: STMicroelectronics

Specifications of L6740LTR

• Applications: Hybrid Controllers
• Voltage - Supply: 9 V ~ 15 V
• Current - Supply: 20mA
• Operating Temperature: 0°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
• Number Of Outputs: 2
• Output Current: 170 A
• Input Voltage: 13.2 V
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Input: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-6298-2

L6740L
7.3
7.4
7.4.1
Figure 13. FB disconnection protection
PWRGOOD
It is an open-drain signal set free after the soft-start sequence has finished; it is the logic
AND between the internal CORE and NB PGOOD (or just the CORE PGOOD in PVI mode).
It is pulled low when the output voltage of one of the two sections drops 250 mV below the
programmed voltage. It is masked during on-the-fly VID transitions as well as when the
CORE section is set to OFF (from SVI bus) while the NB section is still operative.
Over-current
The over-current threshold has to be programmed to a safe value, in order to be sure that
each section doesn't enter OC during normal operation of the device. This value must take
into consideration also the extra current needed during the OTF-VID Transition (I
and the process spread and temperature variations of the sensing elements (DCR and
R
Moreover, since also the internal threshold spreads, the design has to consider the mini-
mum/maximum values of the threshold. Considering the reading method, the two sections
will show different behaviors in OC.
CORE section
L6740L performs two different OC protections for the CORE section: it monitors both the
average current and the per-phase current and allows to set an OC threshold for both.
DS(on)
FB
–
–
CORE_REFERENCE
FBG DISCONNECTED
).
R
R
FB
F
CORE SECTION - VSEN AND FBG DISCONNECTION
OC_PHASE pin allows to define a maximum information current per-phase
(I
current (I
phase (I
programmed end-of-scale current (i.e. if I
the LS mosfet until the threshold is re-crossed (i.e. until I
OC_AVG pin allows to define a maximum total output current for the system
(I
connecting a resistor R
end-of-scale can be implemented. This means that when the voltage present at
the LI pin crosses V
immediately latches with all the mosfets of all the sections OFF (HiZ).
INFOx
OC_AVG
COMP
C
F
). A R
INFOx
VSEN
). A copy of the DROOP current is sourced from the OC_AVG/LI pin. By
OC_TH
OC_TH
500mV
). If the current information for the single phase exceed the
) that is compared with the information current generated for each
FBG
resistor connected to SGND allows to define an end-of-scale
OC_AVGTH
600mV
To VDD_CORE
(Remote Sense)
OC_AVG
CS1-
from DAC...
, the device detects an average OC (OC_AVG) and
to SGND, a load indicator with 2.5 V (V
VSEN
DISCONNECTED
Output voltage monitoring and protections
NB_FB
INFOx
FBG DISCONNECTED
R
NB_REFERENCE
> I
R
NB SECTION - NB_VSEN AND NB_FBR DISCONNECTION
FB_NB
F_NB
OC_TH
NB_COMP
C
F_NB
), the device will turn-on
INFOx
NB_VSEN
< I
500mV
OC_TH
NB_FBG
OC_AVGTH
OTF-VID
).
To VDD_NB
(Remote Sense)
from DAC...
33/44
)
)