ISL8120IRZ-T Intersil, ISL8120IRZ-T Datasheet - Page 30

• Manufacturer Part Number: ISL8120IRZ-T
• Description: IC CTRLR PWM 2/NPHASE 32-QFN
• Manufacturer: Intersil

Specifications of ISL8120IRZ-T

• Pwm Type: Voltage Mode
• Number Of Outputs: 2
• Frequency - Max: 1.5MHz
• Duty Cycle: 90%
• Voltage - Supply: 3 V ~ 22 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Frequency-max: 1.5MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Differential Amplifier for Remote Sense
The differential remote sense buffer has a precision unity
gain resistor matching network, which has a ultra low offset
of 1mV. This true remote sensing scheme helps compensate
the droop due to load on the positive and negative rails and
maintain the high system accuracy of ±0.6%.
The output of the remote sense buffer is connected directly
to the internal OV/UV comparator. As a result, a resistor
divider should be placed on the input of the buffer for proper
regulation, as shown in Figure 24. The VMON pin should be
connected to the FB pin by a standard feedback network.
Since the input impedance of VSEN+ pin in respect to
VSEN- pin is about 500kΩ, it is highly recommended to
include this impedance into calculation and use 100Ω or less
for the lower leg (R
optimize system accuracy. Note that any RC filter at the
inputs of differential amplifier will contribute as a pole to the
overall loop compensation.
As some applications will not need the differential remote
sense, the output of the remote sense buffer can be disabled
and be placed in high impedance by pulling VSEN- within
700mV of VCC. In such an event, the VMON pin can be
FIGURE 21. EQUIVALENT DIFFERENTIAL AMPLIFER
VSEN-
R
VSEN+
DIF
= 500k
OS
FIGURE 22. DUAL OUTPUT VOLTAGE SENSE FOR SINGLE POINT OF FAILURE PROTECTION
) of the feedback resistor divider to
700mV
VCC
30
R
FB
20k
20k
20k
VSEN+
VOUT
R
OS
20k
VSEN-
GAIN=1
GND
ISL8120IRZEC
R
V
VMON
OS
REF
R
FB
OV/UV
COMP
used as an additional monitor of the output voltage with a
resistor divider to protect the system against single point of
failure, which occurs in the system using the same resistor
divider for the UV/OV comparator and the output regulation.
The resistor divider ratio should be the same as the one for
the output regulation so that the correct voltage information
is provided to the OV/UV comparator. Figure 22 shows the
differential sense amplifier can directly used as a monitor
without pulling VSEN- high.
DDR and Dual Mode Operation
If the CLKOUT/REFIN is less than 800mV, an external
soft-start ramp (0.6V) can be in parallel with the Channel 2’s
internal soft-start ramp for DDR/tracking applications (DDR
Mode). The output voltage (typical VTT output) of Channel 2
tracks with the input voltage (typical VDDQ*(1 + k) from
Channel 1) at the CLKOUT/REFIN pin. As for the external
input signal and internal reference signal (ramp and 0.6V), the
one with the lowest voltage will be the one to be used as the
reference comparing with FB signal. Since the UV/OV
comparator uses the same internal reference 0.6V, to
guarantee UV/OV and Pre-charged start-up functions of
Channel 2, the target voltage derived from Channel 1 (VDDQ)
should be scaled close to 0.6V, and it is suggested to be
slightly above (+2%) 0.6V with an external resistor divider,
which will have the Channel 2 use the internal 0.6V reference
after soft-start. Any capacitive load at REFIN pin should not
slow down the ramping of this input 150mV lower than the
Channel 2 internal ramp. Otherwise, the UV protection could
be fault triggered prior to the end of the soft-start. The start-up
of Channel 2 can be delayed to avoid such situation
happening, if high capacitive load presents at REFIN pin for
noise decoupling. During shutdown, Channel 2 will follow
Channel 1 until both channels drops below 87%, at which both
channels enter UV protection zone. Depending on the
FB
Z
ERROR AMP
COMP
COMP
PGOOD
PGOOD
April 21, 2009
FN6763.1