ISL6260CRZ Intersil, ISL6260CRZ Datasheet - Page 15

• Manufacturer Part Number: ISL6260CRZ
• Description: IC CORE REG MULTIPHASE 40-QFN
• Manufacturer: Intersil

Specifications of ISL6260CRZ

• Applications: Converter, Intel IMVP-6
• Number Of Outputs: 1
• Voltage - Output: 0.3 ~ 1.5 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 40-VFQFN, 40-VFQFPN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Input: -

Theory of Operation
Operational Description
The ISL6260 and ISL6260B are multiphase regulators
implementing Intel® IMVP-6 protocol. They can be
programmed for one-, two- or three-channel operation for
microprocessor core applications up to 70A. With their
mating gate driver, the ISL6208, the SL6260 and ISL6260B
give optimum steady-state and transient performance.
At the heart of the ISL6260 and ISL6260B is the patented R
(Robust Ripple Regulator®) modulator. The R
combines the best features of fixed frequency PWM and
hysteretic PWM while eliminating many of their
shortcomings. The ISL6260 and ISL6260B modulator
internally synthesize an analog of the inductor ripple currents
and use hysteretic comparators on those signals to
determine PWM pulse widths. Operating on these large-
amplitude, noise-free synthesized signals allows the
ISL6260 and ISL6260B to achieve lower output ripple and
lower phase jitter than conventional hysteretic and fixed
PWM controllers. Unlike conventional hysteretic converters,
the ISL6260 and ISL6260B have an error amplifier that
allows the controller to maintain a 0.5% voltage tolerance.
The hysteresis window voltage rides on the error amplifier
output such that a load current transient results in an
increase in switching frequency to give the R
faster response than conventional fixed frequency PWM
controllers. The sharing of the hysteretic window voltage
also inherently shares the transient load current between the
phases. The individual average phase voltages are
monitored and controlled to equally share the static current
among the phases.
ISL6260B disables PWM2 when PSI# is asserted low.
ISL6260 does not drop phase with PSI# signal.
15
3
3
regulator a
® modulator
ISL6260, ISL6260B
3
Start-up Timing
With the controller's +5V VDD voltage above the POR
threshold, the start-up sequence begins when VR_ON
exceeds the 3.3V logic HIGH threshold. Approximately
100µs later SOFT and VOUT start ramping up to the boot
voltage of 1.2V. During this interval, the SOFT capacitor is
charged with approximately 40µA. Therefore, if the SOFT
capacitor is selected to be 20nF, the SOFT ramp will be at
about 2mV/µs for a soft-start time of 600µs. Once VOUT is
within 10% of the boot voltage and PGD_IN is HIGH for six
PWM cycles (20µs for frequency = 300kHz), then CLK_EN#
is pulled LOW and the SOFT capacitor is charged up with
approximately 200µA. Therefore, VOUT slews at +10mV/µs
to the voltage set by the VID pins. Approximately seven
milliseconds later, PGOOD is asserted HIGH. A typical start-
up timing is shown in Figure 38. Similar results occur if
VR_ON or PGD_IN or both are tied to VDD, with the soft-
start sequence starting 120µs after VDD crosses the POR
threshold.
PGD_IN - LATCH
It should be noted that PGD_IN going low will cause the
converter to latch off. This state will be cleared when VR_ON
is toggled. This feature allows the converter to respond to
other system voltage outages immediately. For ISL6260B
only, PGD_IN de-assertion (0) during normal operation will
make CLK_EN# go high.
V
SOFT & VO
VR_ON
FIGURE 38. SOFT-START WAVEFORMS USING A 20nF SOFT
DD
CLK_EN#
PGD_IN
IMVP-6 PGOOD
100µs
CAPACITOR
2mV/µs
10mV/µs
20µs
VBOOT
~7ms
VID COMMANDED
VOLTAGE
January 3, 2006
FN9162.1