ISL6260CRZ Intersil, ISL6260CRZ Datasheet - Page 24

• Manufacturer Part Number: ISL6260CRZ
• Description: IC CORE REG MULTIPHASE 40-QFN
• Manufacturer: Intersil

Specifications of ISL6260CRZ

• Applications: Converter, Intel IMVP-6
• Number Of Outputs: 1
• Voltage - Output: 0.3 ~ 1.5 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 40-VFQFN, 40-VFQFPN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Input: -

phase voltages are within 2mV of each other by current
balance circuit. The error current that results is given by
2mV/DCR. If DCR = 1mΩ then the error is 2A.
In the above example, the two errors add to 4A. For a two
phase DC/DC, the currents would be 22A in one phase and
18A in the other phase. In the above analysis, the current
balance can be calculated with 2A/20A = 10%. This is the
worst case calculation, for example, the actual tolerance of
two 10% DCRs is 10%*sqrt(2) = 7%.
There are provisions to correct the current imbalance due to
layout or to purposely divert current to certain phase for better
thermal management. Customer can put a resistor in parallel
with the current sensing capacitor on the phase of interest in
order to purposely increase the current in that phase. But it is
highly recommended for symmetrical layout.
In the case the PC board trace resistance from the inductor
to the microprocessor are not the same on all three phases,
the current will not be balanced. On the phases that have too
much trace resistance a resistor can be added in parallel
with the ISEN capacitor that will correct for the poor layout.
But it is highly recommended for symmetrical layout.
An estimate of the value of the resistor is:
Rtweak = Risen* [2*Rdcr - (Rtrace - Rmin)]/[2(Rtrace - Rmin)]
where Risen is the resistance from the phase node to the
ISEN pin; usually 10kΩ. Rdcr is the DCR resistance of the
inductor. Rtrace is the trace resistance from the inductor to
the microprocessor on the phase that needs to be tweaked.
It should be measured with a good microΩ meter. Rmin is
the trace resistance from the inductor to the microproccessor
on the phase with the least resistance.
For example, if the PC board trace on one phase is 0.5mΩ
and on another trace is 0.3mΩ; and if the DCR is 1.2mΩ;
then the tweaking resistor is Rtweak = 10kΩ * [1.2*2 -
(0.5-0.3)]/[2*(0.5-0.3)] = 55kΩ.
Droop using Discrete Resistor Sensing - Static/
Dynamic Mode of Operation
When choosing current sense resistor, not only the tolerance
of the resistance is important, but also the TCR. And its
combined tolerance at a wide temperature range should be
calculated.
Figure 44 shows the equivalent circuit of a discrete current
sense approach. Figure 36 shows a more detailed
schematic of this approach. Droop is solved the same way
as the DCR sensing approach with a few slight
modifications.
First, there is no NTC required for thermal compensation,
therefore, the Rn resistor network in the previous section is
not required. Secondly, there is no time constant matching
required, therefore, the Cn component is not matched to the
L/DCR time constant, but this component does indeed
provide noise immunity, especially due to the ESL of the
24
ISL6260, ISL6260B
current sensing resistors, and therefore is populated with a
47pF capacitor.
The Rs values in the previous section, Rs = 7.68k_1% are
sufficient for this approach.
Now, the input to the Droop amplifier is the Vrsense voltage.
This voltage is given by the following equation:
The gain of the Droop amplifier, G2, must be adjusted for the
ratio of the Rsense to Droop impedance, Rdroop. We use
the following equation:
Assuming N = 3, Rdroop = 0.0021(V/A) as per the Intel
IMVP-6 specification, Rsense = 0.001Ω, we obtain G2 = 6.3.
The values of Rdrp1 and Rdrp2 are selected to satisfy two
requirements. First, the ratio of Rdrp2 and Rdrp1 determine
the gain G2 = (Rdrp2/Rdrp1)+1. Second, the parallel
combination of Rdrp1 and Rdrp2 should equal the parallel
combination of the Rs resistors. Combining these
requirements gives:
Rdrp1 = G2/(G2-1) * Rs/N
Rdrp2 = (G2-1) * Rdrp1
In the example above, Rs = 7.68K, N = 3, and G2 = 6.3 so
Rdrp 3K and Rdrp2 is 15.8kΩ.
These values are extremely sensitive to layout. Once the
board has been laid out, some tweaking may be required to
adjust the full load Droop. This is fairly easy and can be
accomplished by allowing the system to achieve thermal
equilibrium at full load, and then adjusting Rdrp2 to obtain
the desired Droop value.
Fault Protection - Overcurrent Fault Setting
As previously described, the overcurrent protection of the
ISL6260, ISL6260B is related to the Droop voltage.
Previously we have calculated that the Droop Voltage =
ILoad * Rdroop, where Rdroop is the load line slope
specified as 0.0021 (V/A) in the Intel IMVP-6 specification.
Knowing this relationship, the overcurrent protection
threshold can be set up as a voltage Droop level. Knowing
this voltage droop level, one can program in the appropriate
drop across the Roc resistor. This voltage drop will be
referred to as Voc. Once the droop voltage is greater than
Voc, the PWM drives will turn off and PGOOD will go low.
The selection of Roc is given below in Equation 17.
Assuming we desire an overcurrent trip level, Ioc, of 55A,
and knowing from the Intel Specification that the load line
G2
Vrsense
=
--------------------- -
Rsense
Rdroop
=
Rsense
--------------------- -
×
N
N
×
Iout
January 3, 2006
(EQ. 15)
(EQ. 16)
FN9162.1