ISL59450IQZ Intersil, ISL59450IQZ Datasheet - Page 14

• Manufacturer Part Number: ISL59450IQZ
• Description: IC SWITCH VID CRSSPNT 128-MQFP
• Manufacturer: Intersil

Specifications of ISL59450IQZ

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Descriptions
I
IC RESET, ENABLE AND MISC.
POWER SUPPLIES
18, 20, 42, 125 V
PIN NUMBER
2
C CONTROL AND I/O
120
119
118
117
45
46
47
48
49
50
85
82
92
77
90
V
V
VSLICE
VTIP
V
V
V
V
VSLICE
VTIP
SDA
SCL
Address
Reset
PowerDown
LUMA
LUMA
CHROMA
CHROMA
LUMA
LUMA
A
PIN NAME
IN
IN
x2
x1
A
x2
x1
B
IN
IN
IN
IN
IN
IN
(Continued)
A
B
x2
x1
A
A
B
B
IN
IN
B
B
14
Analog Input. Luma Reference Level for DC-Restore when A
inputs in RGB mode, this DC voltage sets the clamp voltage of the Pr/R and Pb/B signals for Channel A
when the gain is set to x2. When using the YPbPr inputs in YPbPr mode, this DC voltage sets the clamp
voltage of the Pr/R and Pb/B signals for Channel A.This input is typically tied together with V
and driven with the same voltage. The Y/G signal is clamped to the VTIP
V
Analog Input. Luma Reference Level for DC-Restore when A
inputs in RGB mode, this DC voltage sets the clamp voltage of the R and B signals for Channel A when
the gain is set to x1. This input is typically tied together with V
The Y/G signal is clamped to the VTIP
Analog Input. Slicer comparator threshold for extracting composite sync from video, for Channel A. This DC
voltage is typically set to 0.07V above VTIP
typically tied together with VSLICE
Analog Input. Sync Tip Reference Level for DC-Restore, for Channel A. This DC voltage sets the level of
the sync tip of Channel A’s output signal. This input is typically tied together with VTIP
the same voltage. In RGB mode (with no Sync-on-Green), this sets the black level of the G channel.
Analog Input. Chroma Reference Level for DC-Restore when A
the midpoint voltage of the C signal (S-Video) and the Pb, Pr signals (Component video) for Channel A when
the gain is set to x2. When using the YPbPr inputs in YPbPr mode, this DC voltage sets the clamp voltage
of the Pr/R and Pb/B signals for Channel B. This input is typically tied together with V
driven with the same voltage.
Analog Input. Chroma Reference Level for DC-Restore when A
midpoint voltage of the C signal (S-Video) and the Pb, Pr signals (Component video) for Channel A when
the gain is set to x1. When using the YPbPr inputs in YPbPr mode, this DC voltage sets the clamp voltage
of the Pr/R and Pb/B signals for Channel B. This input is typically tied together with V
driven with the same voltage.
Analog Input. Luma Reference Level for DC-Restore when A
inputs in RGB mode, this DC voltage sets the clamp voltage of the R and B signals for Channel B when
the gain is set to x2. This input is typically tied together with V
The Y/G signal is clamped to the VTIP
Analog Input. Luma Reference Level for DC-Restore when A
inputs in RGB mode, this DC voltage sets the clamp voltage of the R and B signals for Channel B when
the gain is set to x1. This input is typically tied together with V
The Y/G signal is clamped to the VTIP
Analog Input. Slicer comparator threshold for extracting composite sync from video, for Channel B. This DC
voltage is typically set to 0.07V above VTIP
typically tied together with VSLICE
Analog Input. Sync Tip Reference Level for DC-Restore, for Channel B. This DC voltage sets the level of
the sync tip of Channel B’s output signal. This input is typically tied together with VTIP
the same voltage. In RGB mode (with no Sync-on-Green), this sets the black level of the G channel.
I
I
Digital Input with internal pull-down. Sets I
5V Digital Input, with 3.5V logic threshold and a 300k pull-down. Tie to +5V for normal operation. Taking
Reset to 0V and back to 5V initializes all data registers to 0x00.
Digital Input with 300k pull-down. When this pin is taken high, all analog circuitry is disabled to minimize
power consumption. In PowerDown mode, the outputs are tri-stated while the I
and all register data is retained.
+5V Analog supply
2
2
LUMA
C Bus Data I/O
C Bus Clock
x2
IN
A in slave mode.
ISL59450
IN
IN
B and driven with the same voltage.
A and driven with the same voltage.
IN
IN
IN
A voltage in master mode and V
B voltage in master mode and V
B voltage in master mode and V
2
C address: 0x84 if tied low, 0x8C if tied high. (300k pull-down)
IN
IN
DESCRIPTION
A, creating a sync tip slicing level of 70mV. This input is
B, creating a sync tip slicing level of 70mV. This input is
V
V
LUMA
V
LUMA
V
LUMA
= 2, for Channel A. When using the YPbPr
= 1, for Channel A. When using the YPbPr
= 2, for Channel B. When using the YPbPr
= 1, for Channel B. When using the YPbPr
V
V
= 2, for Channel A. This DC voltage sets
= 1, for Channel A. This voltage sets the
x1
x2
x1
IN
IN
IN
B and driven with the same voltage.
A and driven with the same voltage.
A and driven with the same voltage.
IN
LUMA
LUMA
LUMA
A voltage in master mode and
2
x1
x2
x1
C interface remains active
IN
IN
IN
A in slave mode.
B in slave mode.
B in slave mode.
CHROMA
CHROMA
IN
IN
B and driven with
A and driven with
LUMA
February 14, 2008
x2
x1
IN
IN
x2
A and
A and
FN7510.0
IN
B