SI5325/26-EVB Silicon Laboratories Inc, SI5325/26-EVB Datasheet - Page 25

• Manufacturer Part Number: SI5325/26-EVB
• Description: BOARD EVAL FOR SI5325/26
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5325/26-EVB

• Main Purpose: Timing, Clock Generator
• Utilized Ic / Part: SI5325, SI5326
• Processor To Be Evaluated: Si5325 and Si5326
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Reset value = 0001 0010
Reset value = 1110 1101
Register 4.
Register 5.
Name
Name
Type
Type
7:6
4:0
7:6
5:0
Bit
Bit
Bit
Bit
5
ICMOS [1:0]
AUTOSEL_
AUTOSEL_REG [1:0]
HIST_DEL
REG [1:0]
Reserved
Reserved
Name
Name
D7
D7
[4:0]
ICMOS [1:0]
R/W
R/W
AUTOSEL_REG [1:0]
Selects method of input clock selection to be used.
00: Manual (either register or pin controlled, see CKSEL_PIN)
01: Automatic Non-Revertive
10: Automatic Revertive
11: Reserved
See the Si53xx Family Reference Manual for a detailed description.
Reserved.
HIST_DEL [4:0].
Selects amount of delay to be used in generating the history information used for Digital
Hold.
See the Si53xx Family Reference Manual for a detailed description.
ICMOS [1:0].
When the output buffer is set to CMOS mode, these bits determine the output buffer drive
strength. The first number below refers to 3.3 V operation; the second to 1.8 V operation.
These values assume CKOUT+ is tied to CKOUT-.
00: 8mA/2mA
01: 16mA/4mA
10: 24mA/6mA
11: 32mA/8mA
Reserved.
D6
D6
Reserved
D5
D5
R
.
Rev. 1.0
D4
D4
Function
Function
D3
D3
Reserved
HIST_DEL [4:0]
R
R/W
D2
D2
D1
D1
Si5326
D0
D0
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