SI5325/26-EVB Silicon Laboratories Inc, SI5325/26-EVB Datasheet - Page 56

BOARD EVAL FOR SI5325/26

SI5325/26-EVB

Manufacturer Part Number
SI5325/26-EVB
Description
BOARD EVAL FOR SI5325/26
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5325/26-EVB

Main Purpose
Timing, Clock Generator
Utilized Ic / Part
SI5325, SI5326
Processor To Be Evaluated
Si5325 and Si5326
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Si5326
Reset value = 1111 1111
56
Register 139.
Name
Type
7:6
3:2
Bit
Bit
5
4
1
0
LOS2_EN
LOS1_EN
FOS2_EN
FOS1_EN
Reserved
Reserved
Name
D7
[1:0]
[1:0]
Reserved
R
Reserved.
Enable CKIN2 LOS Monitoring on the Specified Input (2 of 2).
Note: LOS2_EN is split between two registers.
00: Disable LOS monitoring
01: Reserved
10: Enable LOSA monitoring
11: Enable LOS monitoring
LOSA is a slower and less sensitive version of LOS. See the Si53xx Family Reference
Manual for details
Enable CKIN1 LOS Monitoring on the Specified Input (1 of 2).
Note: LOS1_EN is split between two registers.
00: Disable LOS monitoring
01: Reserved
10: Enable LOSA monitoring
11: Enable LOS monitoring
LOSA is a slower and less sensitive version of LOS. See the Si53xx Family Reference
Manual for details.
Reserved.
Enables FOS on a Per Channel Basis.
0: Disable FOS monitoring
1: Enable FOS monitoring
Enables FOS on a Per Channel Basis.
0: Disable FOS monitoring
1: Enable FOS monitoring
D6
LOS2_EN
[0:0]
R/W
D5
LOS1_EN
[0:0]
R/W
Rev. 1.0
D4
Function
D3
Reserved
R
D2
FOS2_EN
R/W
D1
FOS1_EN
R/W
D0

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