ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 41

• Manufacturer Part Number: ATEVK1104
• Description: KIT DEV/EVAL FOR AVR32 AT32UC3A
• Manufacturer: Atmel
• Series: AVR®32r
• Type: MCUr

Specifications of ATEVK1104

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT32UC3A3
• Data Bus Width: 32 bit
• Interface Type: USB, SPI, USART
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: AT32UC3A3256
• Silicon Family Name: AVR
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT32UC3A3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.4.14
8.4.15
32072C–AVR32–2010/03
Two-Wire Slave Interface
Two-Wire Master Interface
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Master or Slave Serial Peripheral Bus Interface
Connection to Peripheral DMA Controller channel capabilities optimizes data transfers
Compatible with I
Compatible with SMBus standard
Compatible with PMBus
DMA interface for reducing CPU load
Arbitrary transfer lengths, including 0 data bytes
Optional clock stretching if transmit or receive buffers not ready for data transfer
32-bit Peripheral Bus interface for configuration of the interface
Compatible with I
Compatible with SMBus standard
– Serial memories, such as DataFlash and 3-wire EEPROMs
– Serial peripherals, such as ADCs, DACs, LCD controllers, CAN controllers and Sensors
– External co-processors
– 4 - to 16-bit programmable data length per chip select
– Programmable phase and polarity per chip select
– Programmable transfer delays between consecutive transfers and between clock and data
– Programmable delay between consecutive transfers
– Selectable mode fault detection
– One channel for the receiver, one channel for the transmitter
– Next buffer support
– Four character FIFO in reception
– 100 and 400 kbit/s transfer speeds
– 7 and 10-bit and General Call addressing
– Hardware Packet Error Checking (CRC) generation and verification with ACK response
– SMBALERT interface
– 25 ms clock low timeout delay
– 25 ms slave cumulative clock low extend time
– Multi-master support
– 100 and 400 kbit/s transfer speeds
– 7- and 10-bit and General Call addressing
– Hardware Packet Error Checking (CRC) generation and verification with ACK control
– SMBus ALERT interface
– 25 ms clock low timeout delay
– 10 ms master cumulative clock low extend time
– 25 ms slave cumulative clock low extend time
per chip select
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C standard
C standard
AT32UC3A3/A4
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