ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 43

KIT DEV/EVAL FOR AVR32 AT32UC3A

ATEVK1104

Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets

Specifications of ATEVK1104

Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
8.4.18
8.4.19
8.4.20
32072C–AVR32–2010/03
USB On-The-Go Interface
Timer/Counter
Analog-to-Digital Converter
Test Modes
Supports Connection of Two Peripheral DMA Controller Channels (PDCA)
Compatible with the USB 2.0 specification
Supports High (480Mbit/s), Full (12Mbit/s) and Low (1.5Mbit/s) speed communication and On-
The-Go
eight pipes/endpoints
2368 of Embedded Dual-Port RAM (DPRAM) for Pipes/Endpoints
Up to 2 memory banks per Pipe/Endpoint (Not for Control Pipe/Endpoint)
Flexible Pipe/Endpoint configuration and management with dedicated DMA channels
On-Chip UTMI transceiver including Pull-Ups/Pull-downs
On-Chip OTG pad including VBUS analog comparator
Three 16-bit Timer Counter channels
A wide range of functions including:
Each channel is user-configurable and contains:
Internal interrupt signal
Two global registers that act on all three TC channels
Integrated multiplexer offering up to eight independent analog inputs
Individual enable and disable of each channel
Hardware or software trigger
Peripheral DMA Controller support
Possibility of ADC timings configuration
Sleep mode and conversion sequencer
– Full LIN error checking and reporting
– Frame Slot Mode: the Master allocates slots to the scheduled frames automatically.
– Generation of the Wakeup signal
– Remote Loopback, Local Loopback, Automatic Echo
– Offers Buffer Transfer without Processor Intervention
– Frequency measurement
– Event counting
– Interval measurement
– Pulse generation
– Delay timing
– Pulse width modulation
– Up/down capabilities
– Three external clock inputs
– Five internal clock inputs
– Two multi-purpose input/output signals
– External trigger pin
– Timer counter outputs (corresponding TIOA trigger)
– Automatic wakeup on trigger and back to sleep mode after conversions of all enabled
channels
AT32UC3A3/A4
43

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