ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 44

KIT DEV/EVAL FOR AVR32 AT32UC3A

ATEVK1104

Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets

Specifications of ATEVK1104

Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
8.4.21
8.4.22
8.4.23
32072C–AVR32–2010/03
HSB Bus Performance Monitor
Multimedia Card Interface
Error Corrected Code Controller
Allows performance monitoring of High Speed Bus master interfaces
The following is monitored
Automatic handling of event overflow
Compatible with Multimedia Card specification version 4.3
Compatible with SD Memory Card specification version 2.0
Compatible with SDIO specification version 1.1
Compatible with CE-ATA specification 1.1
Cards clock rate up to master clock divided by two
Boot Operation Mode support
High Speed mode support
Embedded power management to slow down clock rate when not used
Supports 2 Slots
Support for stream, block and multi-block data read and write
Supports connection to DMA Controller
Built in FIFO (from 16 to 256 bytes) with large memory aperture supporting incremental access
Support for CE-ATA completion cignal disable command
Protection against unexpected modification on-the-Fly of the configuration registers
Hardware Error Corrected Code Generation with two methods :
Supports NAND Flash and SmartMedia
8-bit data path for ECC-RS
Supports NAND Flash and SmartMedia
(specified by software)
ECC_H supports :
ECC_RS supports :
– Up to 4 masters can be monitored
– Peripheral Bus access to monitor registers
– Data transfer cycles
– Bus stall cycles
– Maximum access latency for a single transfer
– Each slot for either a MultiMediaCard bus (up to 30 cards) or an SD Memory Card
– Minimizes processor intervention for large buffer transfers
– Hamming code detection and correction by software (ECC-H)
– Reed-Solomon code detection by hardware, correction by hardware or software (ECC-RS)
– One bit correction per page of 512,1024,2048, or 4096 bytes
– One bit correction per sector of 512 bytes of data for a page size of 512, 1024, 2048, or 4096
– One bit correction per sector of 256 bytes of data for a page size of 512, 1024, 2048, or 4096
– 4 errors correction per sector of 512 bytes of data for a page size of 512, 1024, 2048, and
bytes
bytes
4096 bytes with 8-bit data path
devices with 8- or 16-bit data path for ECC-H, and with
with page sizes of 528, 1056, 2112, and 4224 bytes
AT32UC3A3/A4
44

Related parts for ATEVK1104