AT91SAM9M10-G45-EK Atmel, AT91SAM9M10-G45-EK Datasheet - Page 481
![KIT EVAL FOR AT91SAMG45/9M10](/photos/9/21/92142/at91sam9m10-g45-ek_sml.jpg)
AT91SAM9M10-G45-EK
Manufacturer Part Number
AT91SAM9M10-G45-EK
Description
KIT EVAL FOR AT91SAMG45/9M10
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Specifications of AT91SAM9M10-G45-EK
Contents
Board, Cables, Power Supply
Processor To Be Evaluated
AT91SAM9M10
Processor Series
AT91SAM9
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet, USB, JTAG
Operating Supply Voltage
5 V
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Features
Two High Speed USB Hosts, LCD TFT Display
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9M10,
Rohs Compliant
Yes
For Use With/related Products
AT91SAM9M10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9M10-G45-EK
Manufacturer:
INFINEON
Quantity:
10 000
Company:
Part Number:
AT91SAM9M10-G45-EK
Manufacturer:
Atmel
Quantity:
135
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30.6.31
Name:
Addresses:
Access:
Reset Value:
• WPEN: Write Protect Enable
0 = Disables the Write Protect if WPKEY corresponds to 0x50494F (“PIO” in ASCII).
1 = Enables the Write Protect if WPKEY corresponds to 0x50494F (“PIO” in ASCII).
Protects the registers listed below:
• WPKEY: Write Protect KEY
Should be written at value 0x534D43 (“SMC” in ASCII). Writing any other value in this field aborts the write operation of the
WPEN bit. Always reads as 0.
6355B–ATARM–21-Jun-10
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
“PIO Enable Register” on page 466
“PIO Disable Register” on page 466
“PIO Output Enable Register” on page 467
“PIO Output Disable Register” on page 468
“PIO Input Filter Enable Register” on page 469
“PIO Input Filter Disable Register” on page 469
“PIO Set Output Data Register” on page 470
“PIO Clear Output Data Register” on page 471
“PIO Multi-driver Enable Register” on page 474
“PIO Multi-driver Disable Register” on page 475
“PIO Pull Up Disable Register” on page 476
“PIO Pull Up Enable Register” on page 476
“PIO Peripheral A Select Register” on page 477
“PIO Peripheral B Select Register” on page 478
“PIO Output Write Enable Register” on page 479
“PIO Output Write Disable Register” on page 479
31
23
15
—
7
PIO Write Protect Mode Register
30
22
14
—
0xFFFFF2E4 (PIOA), 0xFFFFF4E4 (PIOB), 0xFFFFF6E4 (PIOC), 0xFFFFF8E4 (PIOD),
0xFFFFFAE4 (PIOE)
Read-write
See
6
PIO_WPMR
Table 30-2
29
21
13
—
5
28
20
12
—
4
WPKEY
WPKEY
WPKEY
27
19
11
—
3
26
18
10
—
2
AT91SAM9M10
25
17
—
9
1
WPEN
24
16
8
0
481
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