AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 12
AT91SAM9G10-EK
Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Specifications of AT91SAM9G10-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 12 of 730
- Download datasheet (12Mb)
6.4
6.5
12
PIO Controller A, B and C Lines
Shutdown Logic Pins
AT91SAM9G10
The NRST pin integrates a permanent pull-up resistor of 100 kΩ minimum to VDDIOP.
The NRST signal is inserted in the Boundary Scan.
All the I/O lines PA0 to PA31, PB0 to PB31, and PC0 to PC31 integrate a programmable pull-up
resistor of 100 kΩ. Programming of this pull-up resistor is performed independently for each I/O
line through the PIO Controllers.
After reset, all the I/O lines default as inputs with pull-up resistors enabled, except those which
are multiplexed with the External Bus Interface signals that require to be enabled as Peripherals
at reset. This is explicitly indicated in the column “Reset State” of the PIO Controller multiplexing
tables.
The SHDN pin is an output only, driven by Shutdown Controller.
The pin WKUP is an input only. It can accept voltages only between 0V and VDDBU.
6462A–ATARM–03-Jun-09
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