AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 78

KIT DEV FOR SAM9G10 ARM

AT91SAM9G10-EK

Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of AT91SAM9G10-EK

Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
13.6
78
DataFlash Boot Sequence
AT91SAM9G10
Figure 13-6. Serial Flash Download
The Dataflash boot looks for a valid application in the SPI DataFlash memory.
SPI0 is configured in master mode to generate a SPCK at 8MHz. Serial Flash shall be con-
nected to NPCS0.
The DataFlash boot reads the dataflash flash status register (Instruction code 0xD7). The data
flash is considered as ready if bit 7 of the returned status register is set.
If no dataflash is connected or if it does not answer, DataFlash boots exits after a 1000 attempts.
Read the SerialFlash into the internal SRAM.
Restore the reset value for the peripherals.
Set the PC to 0 and perform the REMAP
to jump to the downloaded application
Read the first 8 instructions (0x0b).
(code size to read in vector 6)
Send status command (0x05)
Decode the sixth ARM vector
(except vector 6) are LDR
or Branch instruction
Is status OK ?
8 vectors
Start
End
Yes
Yes
No
No
Jump to next boot
solution
6462A–ATARM–03-Jun-09

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