AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 169
AT91SAM9G10-EK
Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Specifications of AT91SAM9G10-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Figure 22-10. READ_MODE = 1: Data is sampled by SMC before the rising edge of NRD
22.8.2.2
Figure 22-11. READ_MODE = 0: Data is sampled by SMC before the rising edge of NCS
6462A–ATARM–03-Jun-09
Read is Controlled by NCS (READ_MODE = 0)
NBS0,NBS1,
NBS2,NBS3,
A0, A1
NBS0,NBS1,
NBS2,NBS3,
A0, A1
D[31:0]
D[31:0]
A[25:2]
A[25:2]
MCK
MCK
NRD
NCS
NRD
NCS
Figure 22-11
the falling edge of the NCS signal and remains valid until the rising edge of NCS. Data must be
sampled when NCS is raised. In that case, the READ_MODE must be set to 0 (read is controlled
by NCS): the SMC internally samples the data on the rising edge of Master Clock that generates
the rising edge of NCS, whatever the programmed waveform of NRD may be.
shows the typical read cycle of an LCD module. The read data is valid t
t
t
PACC
PACC
Data Sampling
Data Sampling
AT91SAM9G10
PACC
after
169
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