AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 33

KIT DEV FOR SAM9G10 ARM

AT91SAM9G10-EK

Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of AT91SAM9G10-EK

Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
10.7
10.8
10.9
6462A–ATARM–03-Jun-09
Serial Peripheral Interface
Two-wire Interface
USART
• Supports communication with serial external devices
• Master or slave serial peripheral bus interface
• Very fast transfers supported
• Compatibility with standard two-wire serial memories
• One, two or three bytes for slave address
• Sequential read/write operations
• Supports either master or slave modes
• Master, multi-master and slave mode operation
• Bit rate: up to 400 Kbits
• General call supported in slave mode
• Programmable Baud Rate Generator
• 5- to 9-bit full-duplex synchronous or asynchronous serial communications
– Four chip selects with external decoder support allow communication with up to
– Serial memories, such as DataFlash and 3-wire EEPROMs
– Serial peripherals, such as ADCs, DACs, LCD Controllers, CAN Controllers and
– External co-processors
– 8- to 16-bit programmable data length per chip select
– Programmable phase and polarity per chip select
– Programmable transfer delays between consecutive transfers and between clock
– Programmable delay between consecutive transfers
– Selectable mode fault detection
– Transfers with baud rates up to MCK
– The chip select line may be left active to speed up transfers on the same device
– 1, 1.5 or 2 stop bits in Asynchronous Mode or 1 or 2 stop bits in Synchronous Mode
– Parity generation and error detection
– Framing error detection, overrun error detection
– MSB- or LSB-first
– Optional break generation and detection
– By-8 or by-16 over-sampling receiver frequency
– Hardware handshaking RTS-CTS
– Receiver time-out and transmitter timeguard
– Optional Multi-drop Mode with address generation and detection
– Optional Manchester Encoding
fifteen peripherals
Sensors
and data per chip select
AT91SAM9G10
33

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