EVAL-ADUC7026QSPZ Analog Devices Inc, EVAL-ADUC7026QSPZ Datasheet - Page 10

• Manufacturer Part Number: EVAL-ADUC7026QSPZ
• Description: KIT DEV ADUC7026/7027 QUICK PLUS
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ PLUS Kitr
• Type: MCUr

Specifications of EVAL-ADUC7026QSPZ

• Contents: Evaluation Board, Power Supply, Cable, Software, Emulator and Documentation
• Silicon Manufacturer: Analog Devices
• Core Architecture: ARM
• Core Sub-architecture: ARM7TDMI
• Silicon Core Number: ADuC7026
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC7026
• Lead Free Status / Rohs Status: Compliant

ADuC7019/20/21/22/24/25/26/27/28
Table 3. External Memory Read Cycle
Parameter
CLK
t
t
t
t
t
t
t
t
t
t
t
MS_AFTER_CLKH
ADDR_AFTER_CLKH
AE_H_AFTER_MS
AE
HOLD_ADDR_AFTER_AE_L
RD_L_AFTER_AE_L
RD_H_AFTER_CLKH
RD
DATA_BEFORE_RD_H
DATA_AFTER_RD_H
RELEASE_MS_AFTER_RD_H
A/D[15:0]
ECLK
XA16
BHE
GP0
BLE
WS
AE
RS
FFFF
t
MS_AFTER_CLKH
CLK
t
ADDR_AFTER_CLKH
t
AE_H_AFTER_MS
Min
1/MD Clock
4
4
0
16
8
SAMPLE_ADDR_0
2348
t
AE
t
RD_L_AFTER_AE_L
XXXX
t
HOLD_ADDR_AFTER_AE_L
t
RD
Typ
ns typ × (CDPOWCON[2:0] + 1)
½ CLK
(XMxPAR[14:12] + 1) × CLK
½ CLK + (! XMxPAR[10] ) × CLK
½ CLK + (! XMxPAR[10]+ ! XMxPAR[9] ) × CLK
(XMxPAR[3:0] + 1) × CLK
+ (! XMxPAR[9]) × CLK
1 × CLK
CDEF XX
Figure 4. External Memory Read Cycle
SAMPLE_DATA_L
t
RD_H_AFTER_CLKH
t
DATA_BEFORE_RD_H
t
Rev. B | Page 10 of 92
DATA_AFTER_RD_H
SAMPLE_ADDR_1
234A
XX
SAMPLE_DATA_H
Max
8
16
4
89AB
t
RELEASE_WS_AFTER_RD_H
Unit
ns
ns
ns