DEMO9S12XEP100 Freescale Semiconductor, DEMO9S12XEP100 Datasheet - Page 511

• Manufacturer Part Number: DEMO9S12XEP100
• Description: BOARD DEMO FOR MC9S12XEP100
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S12XEP100

• Contents: Board, Cables, CD
• Processor To Be Evaluated: MC9S12XEP100
• Data Bus Width: 16 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12XE
• Rohs Compliant: Yes
• For Use With/related Products: MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.3.2.2
Writes to this register will abort current conversion sequence.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0001
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
ETRIGSEL
SRES[1:0]
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
6–5
W
7
R
ETRIGSEL
ATD Control Register 1 (ATDCTL1)
0
7
External Trigger Source Select — This bit selects the external trigger source to be either one of the AD
channels or one of the ETRIG3-0 inputs. See device specification for availability and connectivity of ETRIG3-
0 inputs. If a particular ETRIG3-0 input option is not available, writing a 1 to ETRISEL only sets the bit but has
not effect, this means that one of the AD channels (selected by ETRIGCH3-0) is configured as the source for
external trigger. The coding is summarized in
A/D Resolution Select — These bits select the resolution of A/D conversion results. See
coding.
WRAP3 WRAP2 WRAP1 WRAP0
1. If only AN0 should be converted use MULT=0.
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
SRES1
0
6
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Table 13-3. Multi-Channel Wrap Around Coding
Figure 13-4. ATD Control Register 1 (ATDCTL1)
MC9S12XE-Family Reference Manual Rev. 1.23
Table 13-4. ATDCTL1 Field Descriptions
SRES0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
5
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
SMP_DIS
0
4
Multiple Channel Conversions (MULT = 1)
Table
Wraparound to AN0 after Converting
Description
13-6.
ETRIGCH3
Chapter 13 Analog-to-Digital Converter (ADC12B16CV1)
1
3
AN10
AN11
AN12
AN13
AN14
AN15
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
ETRIGCH2
2
1
ETRIGCH1
1
1
Table 13-5
ETRIGCH0
for
1
0
511